TY - JOUR
T1 - Self-Reset Transient Detection Circuit for On-Chip Protection Against System-Level Electrical-Transient Disturbance
AU - Kang, Xiao Rui
AU - Ker, Ming-Dou
N1 - Publisher Copyright:
© 2017 IEEE.
PY - 2018/3
Y1 - 2018/3
N2 - A new self-reset transient detection circuit for on-chip protection against a system-level electrical-transient disturbance is proposed. This circuit is designed to detect the occurrence of system-level electrical-transient disturbance events, and automatically reset the system to initial state for the next detection. In addition, the reset time can be adjusted to meet the different requests of system recovery time in microelectronic products. The circuit performance has been investigated by HSPICE simulation and verified in silicon chip. The experiment results in a 0.18- μm complementary metal-oxide semiconductor (CMOS) process with 1.8-V devices have confirmed the detection and self-reset functions of the proposed on-chip self-reset transient detection circuit under system-level electrostatic discharge and electrical-fast-transient testing conditions. With firmware co-design, the proposed detection circuit can provide an effective on-chip solution to recover the microelectronic system from the system-level transient disturbance-induced abnormal state to a known stable state. Therefore, the immunity level of microelectronic products equipped with CMOS integrated circuits against electromagnetic susceptibility can be effectively enhanced.
AB - A new self-reset transient detection circuit for on-chip protection against a system-level electrical-transient disturbance is proposed. This circuit is designed to detect the occurrence of system-level electrical-transient disturbance events, and automatically reset the system to initial state for the next detection. In addition, the reset time can be adjusted to meet the different requests of system recovery time in microelectronic products. The circuit performance has been investigated by HSPICE simulation and verified in silicon chip. The experiment results in a 0.18- μm complementary metal-oxide semiconductor (CMOS) process with 1.8-V devices have confirmed the detection and self-reset functions of the proposed on-chip self-reset transient detection circuit under system-level electrostatic discharge and electrical-fast-transient testing conditions. With firmware co-design, the proposed detection circuit can provide an effective on-chip solution to recover the microelectronic system from the system-level transient disturbance-induced abnormal state to a known stable state. Therefore, the immunity level of microelectronic products equipped with CMOS integrated circuits against electromagnetic susceptibility can be effectively enhanced.
KW - Electrical-fast-transient (EFT) test
KW - electromagnetic susceptibility (EMS)
KW - electrostatic discharge (ESD)
KW - system-level ESD test
KW - transient detection circuit
UR - http://www.scopus.com/inward/record.url?scp=85041854086&partnerID=8YFLogxK
U2 - 10.1109/TDMR.2018.2805184
DO - 10.1109/TDMR.2018.2805184
M3 - Article
AN - SCOPUS:85041854086
SN - 1530-4388
VL - 18
SP - 114
EP - 121
JO - IEEE Transactions on Device and Materials Reliability
JF - IEEE Transactions on Device and Materials Reliability
IS - 1
ER -