Self-Limited Low-Temperature Trimming and Fully Silicided S/D for Vertically Stacked Cantilever Gate-All-Around Poly-Si Junctionless Nanosheet Transistors

Chris Chun Chih Chung, Chun Ming Ko, Tien Sheng Chao*

*Corresponding author for this work

Research output: Contribution to journalArticlepeer-review

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