A new silicon controlled rectifier (SCR)-based transient detection circuit for on-chip protection design against system-level electrical transient disturbance is proposed. The circuit function to detect positive or negative electrical transients during system-level electrostatic discharge (ESD) and electrical fast transient (EFT) tests has been verified in silicon chip. The experimental results in a 0.18-μm CMOS process have confirmed that the new proposed detection circuit can successfully memorize the occurrence of system-level electrical transient disturbance events. The detection results can be cooperated with firmware design to execute system recovery procedures, therefore the immunity of microelectronic systems against system-level ESD or EFT tests can be effectively improved.
|Number of pages||8|
|State||Published - 1 Jan 2014|