Abstract
The silicon-controlled rectifier (SCR) has been reported to protect CMOS integrated circuits (ICs), due to high ESD robustness within a small silicon area. However, the holding voltage ( {V}-{h}{)} of the SCR device was too low to suffer the latch-up issue. Thus, the {V}-{h} value of the SCR device must be improved to be greater than the circuit operating voltage for safe applications. In this work, the Schottky-embedded modified lateral SCR (SMLSCR) with high holding voltage for ESD protection was proposed and verified in a 0.18-boldsymbol mu text{m} 1.8-V/3.3-V CMOS process. By using the Schottky barrier junction, the {V}-{h} value of the SCR device can be improved by the reverse-bias Schottky barrier diode (SBD) that is embedded into the SCR device structure. Among those experimental results on the SMLSCR devices with split layout parameters in the silicon test chip, the SMLSCR device without text{P}{+} guard ring has the best second breakdown current ( {I}-{{t{2}}}{)} of 3.1 A and a high {V}-{h} value of 9.7 V.
Original language | English |
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Article number | 9359347 |
Pages (from-to) | 1764-1771 |
Number of pages | 8 |
Journal | IEEE Transactions on Electron Devices |
Volume | 68 |
Issue number | 4 |
DOIs | |
State | Published - Apr 2021 |
Keywords
- Electrostatic discharge (ESD)
- Schottky barrier diode (SBD)
- Schottky-embedded modified lateral silicon-controlled rectifier (SMLSCR)
- latch-up
- silicon controlled rectifier (SCR)