Room Temperature Cu-Cu Direct Bonding Using Wetting/Passivation Scheme for 3D Integration and Packaging

Zhong Jie Hong, Demin Liu, Shu Ting Hsieh, Han Wen Hu, Ming Wei Weng, Chih I. Cho, Jui Han Liu, Kuan Neng Chen*

*Corresponding author for this work

Research output: Chapter in Book/Report/Conference proceedingConference contributionpeer-review

3 Scopus citations

Abstract

Ultra-low temperature wafer-level Cu-Cu direct bonding with wetting/passivation scheme has been successfully demonstrated at (1) room temperature with post-annealing at 100 , or (2) 40 bonding without the post-annealing process. In this bonding structure, a wetting layer and a passivation layer were deposited on the Cu surface to improve the surface conditions and enhance the diffusion behavior of Cu atoms. In addition, the wetting layer can prevent formation of AuCu3 between passivation and Cu, which is beneficial for Cu bonding at a lower temperature. The proposed bonding structure provides the breakthrough to realize wafer-level Cu-Cu direct bonding with an almost thermal stress-free process, which is key to improve reliability and broaden applications of 3D integration and advanced packaging.

Original languageEnglish
Title of host publication2022 IEEE Symposium on VLSI Technology and Circuits, VLSI Technology and Circuits 2022
PublisherInstitute of Electrical and Electronics Engineers Inc.
Pages387-388
Number of pages2
ISBN (Electronic)9781665497725
DOIs
StatePublished - 2022
Event2022 IEEE Symposium on VLSI Technology and Circuits, VLSI Technology and Circuits 2022 - Honolulu, United States
Duration: 12 Jun 202217 Jun 2022

Publication series

NameDigest of Technical Papers - Symposium on VLSI Technology
Volume2022-June
ISSN (Print)0743-1562

Conference

Conference2022 IEEE Symposium on VLSI Technology and Circuits, VLSI Technology and Circuits 2022
Country/TerritoryUnited States
CityHonolulu
Period12/06/2217/06/22

Keywords

  • 3DIC
  • Cu-Cu bonding
  • passivation layer
  • Room temperature bonding
  • wetting layer

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