Resistive random access memory (RRAM) technology: From material, device, selector, 3D integration to bottom-up fabrication

Hong Yu Chen; Stefano Brivio; Che Chia Chang; Jacopo Frascaroli; Tuo-Hung Hou; Boris Hudec; Ming Liu; Hangbing Lv; Gabriel Molas; Joon Sohn; Sabina Spiga; V. Mani Teja; Elisa Vianello; H. S.Philip Wong

doi:10.1007/s10832-017-0095-9

Resistive random access memory (RRAM) technology: From material, device, selector, 3D integration to bottom-up fabrication

Hong Yu Chen^*, Stefano Brivio, Che Chia Chang, Jacopo Frascaroli, Tuo-Hung Hou, Boris Hudec, Ming Liu, Hangbing Lv, Gabriel Molas, Joon Sohn, Sabina Spiga, V. Mani Teja, Elisa Vianello, H. S.Philip Wong

^*Corresponding author for this work

Department of Electrical and Computer Engineering

Research output: Contribution to journal › Article › peer-review

65 Scopus citations

Abstract

Emerging non-volatile memory technologies are promising due to their anticipated capacity benefits, non-volatility, and zero idle energy. One of the most promising candidates is resistive random access memory (RRAM) based on resistive switching (RS). This paper reviews the development of RS device technology including the fundamental physics, material engineering, three-dimension (3D) integration, and bottom-up fabrication. The device operation, physical mechanisms for resistive switching, reliability metrics, and memory cell selector candidates are summarized from the recent advancement in both industry and academia. Options for 3D memory array architectures are presented for the mass storage application. Finally, the potential application of bottom-up fabrication approaches for effective manufacturing is introduced.

Original language	English
Pages (from-to)	21-38
Number of pages	18
Journal	Journal of Electroceramics
Volume	39
Issue number	1-4
DOIs	https://doi.org/10.1007/s10832-017-0095-9
State	Published - 1 Dec 2017

Keywords

3D integration
Bottom-up fabrication
Resistive random access memory (RRAM)
Resistive switching device
Selector

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10.1007/s10832-017-0095-9

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Chen, H. Y., Brivio, S., Chang, C. C., Frascaroli, J., Hou, T-H., Hudec, B., Liu, M., Lv, H., Molas, G., Sohn, J., Spiga, S., Teja, V. M., Vianello, E., & Wong, H. S. P. (2017). Resistive random access memory (RRAM) technology: From material, device, selector, 3D integration to bottom-up fabrication. Journal of Electroceramics, 39(1-4), 21-38. https://doi.org/10.1007/s10832-017-0095-9

@article{a10a95e6e77f4ecbb5e5ec0414b543a9,

title = "Resistive random access memory (RRAM) technology: From material, device, selector, 3D integration to bottom-up fabrication",

abstract = "Emerging non-volatile memory technologies are promising due to their anticipated capacity benefits, non-volatility, and zero idle energy. One of the most promising candidates is resistive random access memory (RRAM) based on resistive switching (RS). This paper reviews the development of RS device technology including the fundamental physics, material engineering, three-dimension (3D) integration, and bottom-up fabrication. The device operation, physical mechanisms for resistive switching, reliability metrics, and memory cell selector candidates are summarized from the recent advancement in both industry and academia. Options for 3D memory array architectures are presented for the mass storage application. Finally, the potential application of bottom-up fabrication approaches for effective manufacturing is introduced.",

keywords = "3D integration, Bottom-up fabrication, Resistive random access memory (RRAM), Resistive switching device, Selector",

author = "Chen, {Hong Yu} and Stefano Brivio and Chang, {Che Chia} and Jacopo Frascaroli and Tuo-Hung Hou and Boris Hudec and Ming Liu and Hangbing Lv and Gabriel Molas and Joon Sohn and Sabina Spiga and Teja, {V. Mani} and Elisa Vianello and Wong, {H. S.Philip}",

year = "2017",

month = dec,

day = "1",

doi = "10.1007/s10832-017-0095-9",

language = "English",

volume = "39",

pages = "21--38",

journal = "Journal of Electroceramics",

issn = "1385-3449",

publisher = "Springer Netherlands",

number = "1-4",

}

Chen, HY, Brivio, S, Chang, CC, Frascaroli, J, Hou, T-H, Hudec, B, Liu, M, Lv, H, Molas, G, Sohn, J, Spiga, S, Teja, VM, Vianello, E & Wong, HSP 2017, 'Resistive random access memory (RRAM) technology: From material, device, selector, 3D integration to bottom-up fabrication', Journal of Electroceramics, vol. 39, no. 1-4, pp. 21-38. https://doi.org/10.1007/s10832-017-0095-9

TY - JOUR

T1 - Resistive random access memory (RRAM) technology

T2 - From material, device, selector, 3D integration to bottom-up fabrication

AU - Chen, Hong Yu

AU - Brivio, Stefano

AU - Chang, Che Chia

AU - Frascaroli, Jacopo

AU - Hou, Tuo-Hung

AU - Hudec, Boris

AU - Liu, Ming

AU - Lv, Hangbing

AU - Molas, Gabriel

AU - Sohn, Joon

AU - Spiga, Sabina

AU - Teja, V. Mani

AU - Vianello, Elisa

AU - Wong, H. S.Philip

PY - 2017/12/1

Y1 - 2017/12/1

N2 - Emerging non-volatile memory technologies are promising due to their anticipated capacity benefits, non-volatility, and zero idle energy. One of the most promising candidates is resistive random access memory (RRAM) based on resistive switching (RS). This paper reviews the development of RS device technology including the fundamental physics, material engineering, three-dimension (3D) integration, and bottom-up fabrication. The device operation, physical mechanisms for resistive switching, reliability metrics, and memory cell selector candidates are summarized from the recent advancement in both industry and academia. Options for 3D memory array architectures are presented for the mass storage application. Finally, the potential application of bottom-up fabrication approaches for effective manufacturing is introduced.

AB - Emerging non-volatile memory technologies are promising due to their anticipated capacity benefits, non-volatility, and zero idle energy. One of the most promising candidates is resistive random access memory (RRAM) based on resistive switching (RS). This paper reviews the development of RS device technology including the fundamental physics, material engineering, three-dimension (3D) integration, and bottom-up fabrication. The device operation, physical mechanisms for resistive switching, reliability metrics, and memory cell selector candidates are summarized from the recent advancement in both industry and academia. Options for 3D memory array architectures are presented for the mass storage application. Finally, the potential application of bottom-up fabrication approaches for effective manufacturing is introduced.

KW - 3D integration

KW - Bottom-up fabrication

KW - Resistive random access memory (RRAM)

KW - Resistive switching device

KW - Selector

UR - http://www.scopus.com/inward/record.url?scp=85021188975&partnerID=8YFLogxK

U2 - 10.1007/s10832-017-0095-9

DO - 10.1007/s10832-017-0095-9

M3 - Article

AN - SCOPUS:85021188975

SN - 1385-3449

VL - 39

SP - 21

EP - 38

JO - Journal of Electroceramics

JF - Journal of Electroceramics

IS - 1-4

ER -

Resistive random access memory (RRAM) technology: From material, device, selector, 3D integration to bottom-up fabrication

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