Abstract
This paper establishes the necessary and sufficient condition for a correct clock resetting such that the functionality of vector clocks can be preserved. A clock reset protocol is presented with its applicability and limitation discussed. Our result indicates that for some applications, the potential of clock overflow can be completely prevented by carefully choosing the condition for initiating the clock reset protocol.
Original language | English |
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Pages (from-to) | 15-20 |
Number of pages | 6 |
Journal | Journal of Parallel and Distributed Computing |
Volume | 43 |
Issue number | 1 |
DOIs | |
State | Published - 25 May 1997 |