Relaxation analysis to understand positive bias induced trapping in ferroelectric FETs with Si and Gd dopants

In this work, the relaxation analysis is performed to understand the V_TH instability in FeFETs with two different dopants, i.e., Si and Gd. The FeFETs with different dopants show the different delay-after-write characteristics, i.e., Gd:HfO₂ FeFETs show a better delay-after-write stability compared to the case of Si:HfO₂ FeFETs. With the relaxation analysis, Si:HfO₂ FeFETs exhibit an obvious V_TH recovery during the relaxation phases. Furthermore, the power law fitting is used to analyze the V_TH shift under the positive program bias, indicating that a wide and easily accessible defects can exist in the IL and/or Si:HfO₂ since the smaller overdrive voltage dependence exponent (γ) is obtained in Si:HfO₂. Last, the smaller V_TH shift/recovery in Gd:HfO₂ FeFETs can be attributed to a relatively tighter defect distribution, indicating that the dopants in the ferroelectric layer and the defects in IL and/or ferroelectric dielectric have to be carefully optimized to achieve the better V_TH stability.