TY - GEN
T1 - Recent Enhancements in the Standard BSIM-BULK MOSFET Model
AU - Sharma, Ayushi
AU - Zarkob, Yawar Hayat
AU - Goel, Ravi
AU - Dabhi, Chetan Kumar
AU - Pahwa, Girish
AU - Hu, Chenming
AU - Chauhan, Yogesh Singh
N1 - Publisher Copyright:
© 2022 IEEE.
PY - 2022
Y1 - 2022
N2 - This paper briefly discusses all the recent enhancements made in the BSIM-BULK MOSFET model. It is a charge-based industry-standard model developed by the BSIM group, an advanced version of BSIM4 model (threshold voltage-based). Initially, BSIM-BULK was developed for low-voltage devices and to enhance its capability for high voltage operations, a drift resistance-based model is also included as one of the important enhancements in its recent version. Moreover, the new model for bulk charge effect in the latest version improves the fitting flexibility of current and capacitance models. Several other noticeable enhancements are body bias and gate bias dependence addition to the high voltage model, improved flicker noise model of MOSFET and EDGEFET, adding flicker noise model due to external S/D resistances, and drain-body diode junction current splitting in HVMOS. All the enhancements have been validated with the experimental data and also passed the Gummel and AC symmetry tests. The latest model has better accuracy, convergence, and performance compared to previous versions of BSIM-BULK model.
AB - This paper briefly discusses all the recent enhancements made in the BSIM-BULK MOSFET model. It is a charge-based industry-standard model developed by the BSIM group, an advanced version of BSIM4 model (threshold voltage-based). Initially, BSIM-BULK was developed for low-voltage devices and to enhance its capability for high voltage operations, a drift resistance-based model is also included as one of the important enhancements in its recent version. Moreover, the new model for bulk charge effect in the latest version improves the fitting flexibility of current and capacitance models. Several other noticeable enhancements are body bias and gate bias dependence addition to the high voltage model, improved flicker noise model of MOSFET and EDGEFET, adding flicker noise model due to external S/D resistances, and drain-body diode junction current splitting in HVMOS. All the enhancements have been validated with the experimental data and also passed the Gummel and AC symmetry tests. The latest model has better accuracy, convergence, and performance compared to previous versions of BSIM-BULK model.
KW - BSIM-BULK
KW - Compact Model
KW - Flicker Noise
KW - High Voltage Model
KW - LDMOS
UR - https://www.scopus.com/pages/publications/85160534794
U2 - 10.1109/ICEE56203.2022.10118345
DO - 10.1109/ICEE56203.2022.10118345
M3 - Conference contribution
AN - SCOPUS:85160534794
T3 - 2022 IEEE International Conference on Emerging Electronics, ICEE 2022
BT - 2022 IEEE International Conference on Emerging Electronics, ICEE 2022
PB - Institute of Electrical and Electronics Engineers Inc.
T2 - 2022 IEEE International Conference on Emerging Electronics, ICEE 2022
Y2 - 11 December 2022 through 14 December 2022
ER -