TY - GEN
T1 - Reactant minimization for multi-target sample preparation on digital microfluidic biochips using network flow models
AU - Fan, Kang Yi
AU - Yamashita, Shigeru
AU - Huang, Juinn Dar
N1 - Publisher Copyright:
© 2019 IEEE.
PY - 2019/4
Y1 - 2019/4
N2 - Sample preparation is one of those fundamental processes in biochemical reactions. In order to obtain target concentrations properly, raw reactants are processed through a series of dilution operations. Since some rare reactants, such as infant blood or DNA evidence from a crime scene, are extremely difficult to acquire, it is important to minimize their consumption and waste during sample preparation. In this paper, we propose a multitarget sample preparation algorithm for reactant minimization on digital microfluidic biochips. Given a set of target concentrations, the proposed method first converts the reactant minimization problem into a network flow model, and then solves it through integer linear programming (ILP) accordingly. Experimental results demonstrate that our new algorithm can reduce the reactant consumption by up to 31% as compared with the current state-of-the-art.
AB - Sample preparation is one of those fundamental processes in biochemical reactions. In order to obtain target concentrations properly, raw reactants are processed through a series of dilution operations. Since some rare reactants, such as infant blood or DNA evidence from a crime scene, are extremely difficult to acquire, it is important to minimize their consumption and waste during sample preparation. In this paper, we propose a multitarget sample preparation algorithm for reactant minimization on digital microfluidic biochips. Given a set of target concentrations, the proposed method first converts the reactant minimization problem into a network flow model, and then solves it through integer linear programming (ILP) accordingly. Experimental results demonstrate that our new algorithm can reduce the reactant consumption by up to 31% as compared with the current state-of-the-art.
UR - http://www.scopus.com/inward/record.url?scp=85068596911&partnerID=8YFLogxK
U2 - 10.1109/VLSI-DAT.2019.8742025
DO - 10.1109/VLSI-DAT.2019.8742025
M3 - Conference contribution
AN - SCOPUS:85068596911
T3 - 2019 International Symposium on VLSI Design, Automation and Test, VLSI-DAT 2019
BT - 2019 International Symposium on VLSI Design, Automation and Test, VLSI-DAT 2019
PB - Institute of Electrical and Electronics Engineers Inc.
T2 - 2019 International Symposium on VLSI Design, Automation and Test, VLSI-DAT 2019
Y2 - 22 April 2019 through 25 April 2019
ER -
