Rapid prediction of rram reset-state disturb by ramped voltage stress

Wun Cheng Luo*, Kuan Liang Lin, Jiun Jia Huang, Chung Lun Lee, Tuo-Hung Hou

*Corresponding author for this work

    Research output: Contribution to journalArticlepeer-review

    19 Scopus citations

    Abstract

    This letter proposes a novel technique for predicting with high confidence the disturbance of the resistive-switching random access memory (RRAM) RESET state based on ramped voltage stress. The technique yields statistical distributions and voltage acceleration parameters equivalent to those of a conventional constant voltage method. Several ramp rates and acceleration models were validated for the accuracy regarding conversion between the two methods. The proposed method not only reduces the time and cost of reliability analysis but also provides a quantitative link between disturbance properties and the widely available RRAM data measured by a linear voltage ramp. Additionally, the non-Poisson area scaling supports the localized filament model.

    Original languageEnglish
    Article number6165330
    Pages (from-to)597-599
    Number of pages3
    JournalIEEE Electron Device Letters
    Volume33
    Issue number4
    DOIs
    StatePublished - 1 Apr 2012

    Keywords

    • Read disturb
    • reliability
    • resistive switching
    • resistive-switching random access memory (RRAM)
    • voltage acceleration model

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