Precoder/two-stage equaliser for block-based single-carrier transmission with insufficient guard interval

Y. Song; Carrson C. Fung; K. T. Wong; H. Meng; D. F. Tseng

doi:10.1049/el.2011.0559

Precoder/two-stage equaliser for block-based single-carrier transmission with insufficient guard interval

Y. Song^*, Carrson C. Fung, K. T. Wong, H. Meng, D. F. Tseng

^*Corresponding author for this work

Research output: Contribution to journal › Article › peer-review

1 Scopus citations

Abstract

Proposed is a zero-inserting precoder and a two-stage linear equaliser, to shorten the guard interval in block-based single-carrier modulation. The first-stage equaliser consists of a linear single-tapper-subcarrier frequency-domain equaliser. The second-stage equaliser maximises the SINR, in the time-domain, based on the interference-plus-noise estimated from the zero-padded sub-intervals of the single-carrier modulation. This proposed scheme is applicable even without cyclic prefixing.

Original language	English
Pages (from-to)	746-748
Number of pages	3
Journal	Electronics Letters
Volume	47
Issue number	13
DOIs	https://doi.org/10.1049/el.2011.0559
State	Published - 23 Jun 2011

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abstract = "Proposed is a zero-inserting precoder and a two-stage linear equaliser, to shorten the guard interval in block-based single-carrier modulation. The first-stage equaliser consists of a linear single-tapper-subcarrier frequency-domain equaliser. The second-stage equaliser maximises the SINR, in the time-domain, based on the interference-plus-noise estimated from the zero-padded sub-intervals of the single-carrier modulation. This proposed scheme is applicable even without cyclic prefixing.",

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AU - Song, Y.

AU - Fung, Carrson C.

AU - Wong, K. T.

AU - Meng, H.

AU - Tseng, D. F.

PY - 2011/6/23

Y1 - 2011/6/23

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AB - Proposed is a zero-inserting precoder and a two-stage linear equaliser, to shorten the guard interval in block-based single-carrier modulation. The first-stage equaliser consists of a linear single-tapper-subcarrier frequency-domain equaliser. The second-stage equaliser maximises the SINR, in the time-domain, based on the interference-plus-noise estimated from the zero-padded sub-intervals of the single-carrier modulation. This proposed scheme is applicable even without cyclic prefixing.

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Precoder/two-stage equaliser for block-based single-carrier transmission with insufficient guard interval

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