Polycrystalline silicon thin-film transistor with self-aligned SiGe raised source/drain

Du Zen Peng; Ting Chang Chang; Po Sheng Shih; Hsiao-Wen Zan; Tiao Yuan Huang; Chun Yen Chang; Po-Tsun Liu

doi:10.1063/1.1528727

Polycrystalline silicon thin-film transistor with self-aligned SiGe raised source/drain

Du Zen Peng^*, Ting Chang Chang, Po Sheng Shih, Hsiao-Wen Zan, Tiao Yuan Huang, Chun Yen Chang, Po-Tsun Liu

^*Corresponding author for this work

Department of Photonics

Research output: Contribution to journal › Article › peer-review

19 Scopus citations

Abstract

The fabrication of polycrystalline silicon thin-film transistor (TFT) with self-aligned SiGe raised source/drain (SiGe-RSD) was discussed. The SiGe-RSD regions were grown using ultrahigh vacuum chemical vapor deposition at 550 °C. It was shown that with SiH₄ and GeH₄ gas flow rates of 5 and 2 sccm, the poly-SiGe could be selectively grown upto 100 nm for source drain regions.

Original language	English
Pages (from-to)	4763-4765
Number of pages	3
Journal	Applied Physics Letters
Volume	81
Issue number	25
DOIs	https://doi.org/10.1063/1.1528727
State	Published - 16 Dec 2003

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title = "Polycrystalline silicon thin-film transistor with self-aligned SiGe raised source/drain",

abstract = "The fabrication of polycrystalline silicon thin-film transistor (TFT) with self-aligned SiGe raised source/drain (SiGe-RSD) was discussed. The SiGe-RSD regions were grown using ultrahigh vacuum chemical vapor deposition at 550 °C. It was shown that with SiH4 and GeH4 gas flow rates of 5 and 2 sccm, the poly-SiGe could be selectively grown upto 100 nm for source drain regions.",

author = "Peng, \{Du Zen\} and Chang, \{Ting Chang\} and Shih, \{Po Sheng\} and Hsiao-Wen Zan and Huang, \{Tiao Yuan\} and Chang, \{Chun Yen\} and Po-Tsun Liu",

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T1 - Polycrystalline silicon thin-film transistor with self-aligned SiGe raised source/drain

AU - Peng, Du Zen

AU - Chang, Ting Chang

AU - Shih, Po Sheng

AU - Zan, Hsiao-Wen

AU - Huang, Tiao Yuan

AU - Chang, Chun Yen

AU - Liu, Po-Tsun

PY - 2003/12/16

Y1 - 2003/12/16

N2 - The fabrication of polycrystalline silicon thin-film transistor (TFT) with self-aligned SiGe raised source/drain (SiGe-RSD) was discussed. The SiGe-RSD regions were grown using ultrahigh vacuum chemical vapor deposition at 550 °C. It was shown that with SiH4 and GeH4 gas flow rates of 5 and 2 sccm, the poly-SiGe could be selectively grown upto 100 nm for source drain regions.

AB - The fabrication of polycrystalline silicon thin-film transistor (TFT) with self-aligned SiGe raised source/drain (SiGe-RSD) was discussed. The SiGe-RSD regions were grown using ultrahigh vacuum chemical vapor deposition at 550 °C. It was shown that with SiH4 and GeH4 gas flow rates of 5 and 2 sccm, the poly-SiGe could be selectively grown upto 100 nm for source drain regions.

UR - https://www.scopus.com/pages/publications/0037449318

U2 - 10.1063/1.1528727

DO - 10.1063/1.1528727

M3 - Article

AN - SCOPUS:0037449318

SN - 0003-6951

VL - 81

SP - 4763

EP - 4765

JO - Applied Physics Letters

JF - Applied Physics Letters

IS - 25

ER -

Polycrystalline silicon thin-film transistor with self-aligned SiGe raised source/drain

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