Plate-Noise Analysis of an On-Chip Generated Half-VDD Biased-Plate PMOS Cell in CMOS DRAM's

Nicky C.C. Lu, Hu H. Chao, Wei Hwang

Research output: Contribution to journalArticlepeer-review

11 Scopus citations

Fingerprint

Dive into the research topics of 'Plate-Noise Analysis of an On-Chip Generated Half-VDD Biased-Plate PMOS Cell in CMOS DRAM's'. Together they form a unique fingerprint.

Keyphrases

Engineering