Perimeter effects in small geometry bipolar transistors

Wai Lcc, Jack Y.C. Sun, James Warnock, Keith A. Jenkins

Research output: Chapter in Book/Report/Conference proceedingConference contributionpeer-review

1 Scopus citations

Abstract

Advanced bipolar technologies with sub-0.5μim emitters have been reported recently [1,2]. Variations of the current gain and cut-off frequency with emitter sizes were observed (3-5). However, the existing interpretations of experimental data are clouded by the interplay of effects of two different origins: (I) geometrical effects due to increasing contribution from device perimeters; (2) variations of intrinsic vertical doping profiles with emitter size in the process J3,3 J. Effects due to the latter category arc exported to he overcome by improved processing technology. Therefore, this study aims for examining the fundamental limits on device performance imposed by geometrical effects. Results of an extensive three-dimensional (3D) device simulation study will be given and compared with experimental results of a 0.25(itn bipolar technology.

Original languageEnglish
Title of host publication1992 Symposium on VLSI Technology - Digest of Technical Papers, VLSI Technology 1992
PublisherInstitute of Electrical and Electronics Engineers Inc.
Pages56-57
Number of pages2
ISBN (Electronic)0780306988
DOIs
StatePublished - 1992
Event1992 Symposium on VLSI Technology - Digest of Technical Papers, VLSI Technology 1992 - Seattle, United States
Duration: 2 Jun 19924 Jun 1992

Publication series

NameDigest of Technical Papers - Symposium on VLSI Technology
Volume1992-June
ISSN (Print)0743-1562

Conference

Conference1992 Symposium on VLSI Technology - Digest of Technical Papers, VLSI Technology 1992
Country/TerritoryUnited States
CitySeattle
Period2/06/924/06/92

Fingerprint

Dive into the research topics of 'Perimeter effects in small geometry bipolar transistors'. Together they form a unique fingerprint.

Cite this