Performance evaluation of pass-transistor-based circuits using monolayer and bilayer 2-D transition metal dichalcogenide (TMD) MOSFETs for 5.9nm node

Chang Hung Yu; Jun Teng Zheng; Pin Su; Ching Te Chuang

doi:10.1109/VLSI-TSA.2017.7942457

Performance evaluation of pass-transistor-based circuits using monolayer and bilayer 2-D transition metal dichalcogenide (TMD) MOSFETs for 5.9nm node

Chang Hung Yu, Jun Teng Zheng, Pin Su, Ching Te Chuang

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution › peer-review

Abstract

We comprehensively evaluate and benchmark the performance of pass-transistor logic (PTL) circuits using monolayer and bilayer transition metal dichalcogenide (TMD) devices based on ITRS 2028 node. Our study indicates that the higher V_T of bilayer TMD devices significantly degrades the performance of single pass-transistor based circuits compared with the monolayer counterparts despite the higher mobility of bilayer TMD devices. The effect can be mitigated by using full transmission gate or providing a complementary path.

Original language	English
Title of host publication	2017 International Symposium on VLSI Technology, Systems and Application, VLSI-TSA 2017
Publisher	Institute of Electrical and Electronics Engineers Inc.
ISBN (Electronic)	9781509058051
DOIs	https://doi.org/10.1109/VLSI-TSA.2017.7942457
State	Published - 7 Jun 2017
Event	2017 International Symposium on VLSI Technology, Systems and Application, VLSI-TSA 2017 - Hsinchu, Taiwan Duration: 24 Apr 2017 → 27 Apr 2017

Publication series

Name	2017 International Symposium on VLSI Technology, Systems and Application, VLSI-TSA 2017

Conference

Conference	2017 International Symposium on VLSI Technology, Systems and Application, VLSI-TSA 2017
Country/Territory	Taiwan
City	Hsinchu
Period	24/04/17 → 27/04/17

Access to Document

10.1109/VLSI-TSA.2017.7942457

Cite this

Yu, C. H., Zheng, J. T., Su, P., & Chuang, C. T. (2017). Performance evaluation of pass-transistor-based circuits using monolayer and bilayer 2-D transition metal dichalcogenide (TMD) MOSFETs for 5.9nm node. In 2017 International Symposium on VLSI Technology, Systems and Application, VLSI-TSA 2017 Article 7942457 (2017 International Symposium on VLSI Technology, Systems and Application, VLSI-TSA 2017). Institute of Electrical and Electronics Engineers Inc.. https://doi.org/10.1109/VLSI-TSA.2017.7942457

Yu, Chang Hung ; Zheng, Jun Teng ; Su, Pin et al. / Performance evaluation of pass-transistor-based circuits using monolayer and bilayer 2-D transition metal dichalcogenide (TMD) MOSFETs for 5.9nm node. 2017 International Symposium on VLSI Technology, Systems and Application, VLSI-TSA 2017. Institute of Electrical and Electronics Engineers Inc., 2017. (2017 International Symposium on VLSI Technology, Systems and Application, VLSI-TSA 2017).

@inproceedings{cf18d2cf54364f50aa0a9bd21ee005c4,

title = "Performance evaluation of pass-transistor-based circuits using monolayer and bilayer 2-D transition metal dichalcogenide (TMD) MOSFETs for 5.9nm node",

abstract = "We comprehensively evaluate and benchmark the performance of pass-transistor logic (PTL) circuits using monolayer and bilayer transition metal dichalcogenide (TMD) devices based on ITRS 2028 node. Our study indicates that the higher VT of bilayer TMD devices significantly degrades the performance of single pass-transistor based circuits compared with the monolayer counterparts despite the higher mobility of bilayer TMD devices. The effect can be mitigated by using full transmission gate or providing a complementary path.",

author = "Yu, {Chang Hung} and Zheng, {Jun Teng} and Pin Su and Chuang, {Ching Te}",

year = "2017",

month = jun,

day = "7",

doi = "10.1109/VLSI-TSA.2017.7942457",

language = "English",

series = "2017 International Symposium on VLSI Technology, Systems and Application, VLSI-TSA 2017",

publisher = "Institute of Electrical and Electronics Engineers Inc.",

booktitle = "2017 International Symposium on VLSI Technology, Systems and Application, VLSI-TSA 2017",

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note = "2017 International Symposium on VLSI Technology, Systems and Application, VLSI-TSA 2017 ; Conference date: 24-04-2017 Through 27-04-2017",

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Yu, CH, Zheng, JT, Su, P & Chuang, CT 2017, Performance evaluation of pass-transistor-based circuits using monolayer and bilayer 2-D transition metal dichalcogenide (TMD) MOSFETs for 5.9nm node. in 2017 International Symposium on VLSI Technology, Systems and Application, VLSI-TSA 2017., 7942457, 2017 International Symposium on VLSI Technology, Systems and Application, VLSI-TSA 2017, Institute of Electrical and Electronics Engineers Inc., 2017 International Symposium on VLSI Technology, Systems and Application, VLSI-TSA 2017, Hsinchu, Taiwan, 24/04/17. https://doi.org/10.1109/VLSI-TSA.2017.7942457

Performance evaluation of pass-transistor-based circuits using monolayer and bilayer 2-D transition metal dichalcogenide (TMD) MOSFETs for 5.9nm node. / Yu, Chang Hung; Zheng, Jun Teng; Su, Pin et al.
2017 International Symposium on VLSI Technology, Systems and Application, VLSI-TSA 2017. Institute of Electrical and Electronics Engineers Inc., 2017. 7942457 (2017 International Symposium on VLSI Technology, Systems and Application, VLSI-TSA 2017).

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution › peer-review

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Yu CH, Zheng JT, Su P, Chuang CT. Performance evaluation of pass-transistor-based circuits using monolayer and bilayer 2-D transition metal dichalcogenide (TMD) MOSFETs for 5.9nm node. In 2017 International Symposium on VLSI Technology, Systems and Application, VLSI-TSA 2017. Institute of Electrical and Electronics Engineers Inc. 2017. 7942457. (2017 International Symposium on VLSI Technology, Systems and Application, VLSI-TSA 2017). doi: 10.1109/VLSI-TSA.2017.7942457

Performance evaluation of pass-transistor-based circuits using monolayer and bilayer 2-D transition metal dichalcogenide (TMD) MOSFETs for 5.9nm node

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