Parallel-RC feedback low-noise amplifier for UWB applications

Kuang Chi He*, Ming Tsung Li, Chen Ming Li, Jenn-Hawn Tarng

*Corresponding author for this work

Research output: Contribution to journalArticlepeer-review

33 Scopus citations


A two-stage 3.1-to 10.6-GHz ultrawideband CMOS low-noise amplifier (LNA) is presented. In our design, a parallel resistance-capacitance shunt feedback with a source inductance is proposed to obtain broadband input matching and to reduce the noise level effectively; furthermore, a parallel inductance- capacitance network at drain is drawn to further suppress the noise, and a very low noise level is achieved. The proposed LNA is implemented by the Taiwan Semiconductor Manufacturing Company 0.18μCMOS technology. Measured results show that the noise figure is 2.5-4.7 dB from 3.1 to 10.6 GHz, which may be the best result among previous reports in the 0.18-ìm CMOS 3.1-to 10.6-GHz ultrawideband LNA. The power gain is 10.9-13.9 dB from 3.1 to 10.6 GHz. The input return loss is below.9.4 dB from 3.1 to 15 GHz. It consumes 14.4 mW from a 1.4-V supply voltage and occupies an area of only 0.46 mm2.

Original languageEnglish
Article number5497111
Pages (from-to)582-586
Number of pages5
JournalIEEE Transactions on Circuits and Systems I: Regular Papers
Issue number8
StatePublished - 1 Aug 2010


  • Broadband
  • complimentary metaloxidesemiconductor (CMOS) low-noise amplifier (LNA)
  • feedback
  • ultrawideband (UWB)


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