Abstract
The present disclosure provides packet aggregation and disaggregation methods. In the packet aggregation methods, the protocol-independent packet processor (P4) switch stores plural message headers of plural packets in the ring buffer. When the plural message headers stored in the ring buffer reach a pre-defined amount of data, the P4 switch replaces the first flag header in the current packet with a second flag header so as to form a work packet. The egress pipeline of the P4 switch recirculates the work packet repeatedly, whenever it receives a work packet, a message header is extracted from a plurality of message headers in the ring buffer and added to the working packet for packet aggregation.
| Original language | American English |
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| Patent number | US11343360B2 |
| State | Published - 24 May 2022 |