Optimal design of the multiple-apertures-GaN-based vertical HEMTs with SiO2current blocking layer

Niraj Man Shrestha, Yi-Ming Li*, Edward Yi Chang

*Corresponding author for this work

Research output: Contribution to journalArticlepeer-review

12 Scopus citations

Abstract

Gallium nitride (GaN) based vertical high electron mobility transistor (HEMT) is very crucial for high power applications. Combination of advantageous material properties of GaN for high speed applications and novel vertical structure makes this device very beneficial for high power application. To improve the device performance especially in high drain bias condition, a novel GaN based vertical HEMT with silicon dioxide (Formula presented.) current blocking layer (CBL) was reported recently. In this paper, effects of the thickness of CBL layer and the aperture length on the electrical and breakdown characteristics of GaN vertical HEMTs with (Formula presented.) CBL are simulated by using two-dimensional quantum-mechanically corrected device simulation. Intensive numerical study on the device enables us to optimize and conclude that devices with (Formula presented.) -thick (Formula presented.) layer and (Formula presented.) -long aperture will be beneficial considerations to improve the device performance. Notably, using the multiple apertures can effectively reduce the on-state conducting resistance of the device. On increasing the number of apertures, the drain current is increased but the breakdown voltage is decreased. Therefore, device with four apertures is taken as an optimized result. The maximum drain current of 84 mA at (Formula presented.) and (Formula presented.) , and the breakdown voltage of 480 V have been achieved for the optimized device.

Original languageEnglish
Pages (from-to)154-162
Number of pages9
JournalJournal of Computational Electronics
Volume15
Issue number1
DOIs
StatePublished - 1 Mar 2016

Keywords

  • Breakdown voltage
  • Electrical characteristic
  • Multiple apertures
  • Silicon dioxide current blocking layer
  • Simulation
  • Vertical high electron mobility transistor

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