TY - JOUR
T1 - One-Dimensional Binary Convolutional Neural Network Accelerator Design for Bearing Fault Diagnosis
AU - Syu, Zih Syuan
AU - Lee, Ching Hung
N1 - Publisher Copyright:
© 2001-2012 IEEE.
PY - 2024/2/1
Y1 - 2024/2/1
N2 - In the field of equipment anomaly detection, anomalies in equipment or tooling machines can be detected earlier by analyzing vibration signals. However, hardware platforms, such as graphics processing units (GPUs), tensor processing units (TPUs), and workstations, are commonly used for the applications of artificial intelligence (AI), which limits the practical applications due to high-power consumption and high cost; the corresponding large amount of computation reduces the inference speed in real-time industrial environments. In this study, we propose a binary neural network (BNN) accelerator and implement it in a field-programmable gate array (FPGA) for bearing fault diagnosis. By using a 1-D convolutional neural network (CNN), we extract the features of vibration signals and classify the classes of bearing faults with high accuracy. The model weights are trained with only one bit by using a knowledge distillation and binarization algorithm to reduce the storage space. We adopt the FPGA, a reprogrammable, low-power, low-cost platform for CNN implementation. The original convolutional operation is replaced with a more efficient algorithm and a specialized binary model computation engine is designed to accelerate model inference and reduce ON-chip resource utilization. Experimental results and comparisons are introduced to show the optimized binary model required only 0.42 ms to infer on the hardware platform, which is 150 times faster than a 32-bit floating-point neural network of the same architecture and still maintained a higher testing accuracy of 98.5%.
AB - In the field of equipment anomaly detection, anomalies in equipment or tooling machines can be detected earlier by analyzing vibration signals. However, hardware platforms, such as graphics processing units (GPUs), tensor processing units (TPUs), and workstations, are commonly used for the applications of artificial intelligence (AI), which limits the practical applications due to high-power consumption and high cost; the corresponding large amount of computation reduces the inference speed in real-time industrial environments. In this study, we propose a binary neural network (BNN) accelerator and implement it in a field-programmable gate array (FPGA) for bearing fault diagnosis. By using a 1-D convolutional neural network (CNN), we extract the features of vibration signals and classify the classes of bearing faults with high accuracy. The model weights are trained with only one bit by using a knowledge distillation and binarization algorithm to reduce the storage space. We adopt the FPGA, a reprogrammable, low-power, low-cost platform for CNN implementation. The original convolutional operation is replaced with a more efficient algorithm and a specialized binary model computation engine is designed to accelerate model inference and reduce ON-chip resource utilization. Experimental results and comparisons are introduced to show the optimized binary model required only 0.42 ms to infer on the hardware platform, which is 150 times faster than a 32-bit floating-point neural network of the same architecture and still maintained a higher testing accuracy of 98.5%.
KW - Bearing fault diagnosis
KW - binary neural networks (BNNs)
KW - compression
KW - field-programmable gate array (FPGA)
KW - model acceleration
UR - http://www.scopus.com/inward/record.url?scp=85180310169&partnerID=8YFLogxK
U2 - 10.1109/JSEN.2023.3340715
DO - 10.1109/JSEN.2023.3340715
M3 - Article
AN - SCOPUS:85180310169
SN - 1530-437X
VL - 24
SP - 3649
EP - 3658
JO - IEEE Sensors Journal
JF - IEEE Sensors Journal
IS - 3
ER -