On Optimizing Capacitor Array Design for Advanced Node SAR ADC

Keyphrases

• SAR ADC 100%
• Capacitor Array 100%
• Array Design 100%
• Advanced Nodes 100%
• Capacitors 66%
• Parasitic Capacitance 66%
• Low Power 33%
• Good Quality 33%
• Analog-to-digital Converter 33%
• Area Reduction 33%
• Layout Optimization 33%
• Design Decisions 33%
• Energy Consumption Reduction 33%
• Power Efficiency 33%
• Routing Algorithm 33%
• Small Capacitor 33%
• Binary Weights 33%
• Effective number of Bits 33%
• Layout Design 33%
• Analog Layout 33%
• Matching Property 33%
• Capacitance Ratio 33%
• Manual Design 33%
• Setting Time 33%
• Low Power Analogue 33%
• Capacitor Units 33%

Engineering

• Nodes 100%
• Analog-to-Digital Converter 100%
• Successive Approximation 100%
• Parasitic Capacitance 50%
• Experimental Result 25%
• Electric Power Utilization 25%
• Routing Algorithm 25%
• Area Reduction 25%
• Setting Time 25%
• Design Choice 25%

Computer Science

• Analog-to-Digital Converter 100%
• Approximation (Algorithm) 100%
• Parasitic Capacitance 50%
• Experimental Result 25%
• Power Consumption 25%
• Power Efficiency 25%
• Routing Algorithm 25%