On Optimizing Capacitor Array Design for Advanced Node SAR ADC

Cheng Yu Chiang, Chia Lin Hu, Kang Yu Chang, Po-Hung Lin, Shyh Jye Jou, Hung Yu Chen, Chien-Nan Liu, Hung-Ming Chen

Research output: Chapter in Book/Report/Conference proceedingConference contributionpeer-review

1 Scopus citations

Abstract

Due to its excellent power efficiency, the successive-Approximation-register (SAR) analog-To-digital converter (ADC) is an attractive design choice for low-power ADC implements. In analog layout design, the parasitics induced by interconnecting wires and elements affect the accuracy and performance of the device. Due to the requirement of low-power and high-speed, the series of lateral metal-metal very small capacitor units as the architecture of capacitor array is usually adopted. Besides power consumption and area reduction, the parasitic capacitance would significantly affect the matching properties and setting time of capacitors. This work presents a framework to synthesize good-quality binary-weighted capacitors for custom advanced node planar SAR ADC. Also, this work proposed a parasitic-Aware ILP-based routing algorithm, which can generate an optimized layout considering parasitic capacitance and capacitance ratio mismatch simultaneously. The experimental result shows that the effective number of bits (ENOB) of the layout generated by our approach is comparable with manual design and other automated works.

Original languageEnglish
Title of host publicationProceedings - 2022 18th International Conference on Synthesis, Modeling, Analysis and Simulation Methods, and Applications to Circuit Design, SMACD 2022
PublisherInstitute of Electrical and Electronics Engineers Inc.
ISBN (Electronic)9781665467032
DOIs
StatePublished - 2022
Event18th International Conference on Synthesis, Modeling, Analysis and Simulation Methods, and Applications to Circuit Design, SMACD 2022 - Villasimius, Italy
Duration: 12 Jun 202215 Jun 2022

Publication series

NameProceedings - 2022 18th International Conference on Synthesis, Modeling, Analysis and Simulation Methods, and Applications to Circuit Design, SMACD 2022

Conference

Conference18th International Conference on Synthesis, Modeling, Analysis and Simulation Methods, and Applications to Circuit Design, SMACD 2022
Country/TerritoryItaly
CityVillasimius
Period12/06/2215/06/22

Keywords

  • analog-To-digital converter
  • capacitance matching
  • common-centroid
  • linear programming
  • parasitic effect
  • placement
  • routing

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