On-Interposer Decoupling Capacitors Placement for Interposer-based 3DIC

Po Yang Chen*, Chang Yun Liu, Hung Ming Chen, Po Tsang Huang

*Corresponding author for this work

Research output: Chapter in Book/Report/Conference proceedingConference contributionpeer-review

Abstract

With the demand for high performance and density, silicon interposer-based three-dimensional integrated circuit (3DIC) can be one of promising solutions for these requirements. However, simultaneously switching noise (SSN) will cause voltage fluctuation and hence performance degradation and logic failure might occur. Our work proposes an efficient Simulated Annealing (SA) based algorithm to perform decap placement automatically on the interposer. In our solution, target impedance can be achieved within certain frequency range. Results show that number of decaps as well as impedance of PDN are minimized to meet the requirement.

Original languageEnglish
Title of host publicationProceedings of the 24th International Symposium on Quality Electronic Design, ISQED 2023
PublisherIEEE Computer Society
ISBN (Electronic)9798350334753
DOIs
StatePublished - 2023
Event24th International Symposium on Quality Electronic Design, ISQED 2023 - San Francisco, United States
Duration: 5 Apr 20237 Apr 2023

Publication series

NameProceedings - International Symposium on Quality Electronic Design, ISQED
Volume2023-April
ISSN (Print)1948-3287
ISSN (Electronic)1948-3295

Conference

Conference24th International Symposium on Quality Electronic Design, ISQED 2023
Country/TerritoryUnited States
CitySan Francisco
Period5/04/237/04/23

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