On Generating Cell Library in Advanced Nodes: Efforts and Challenges

Hung Ming Chen, Cheng Li Hsiao, Wei Tung Chao, I. Chun Hsieh

Research output: Chapter in Book/Report/Conference proceedingConference contributionpeer-review

Abstract

With the continuous progress of the manufacturing process, the related design rules become more and more complicated. In order to manufacture high complexity ICs, generating cell library in advanced nodes such as FinFET technology is intriguingly essential for fast circuit layout synthesis. This task was usually in manual process, not to mention in FinFET era. In this work, on top of other FinFET cell library generation works, we propose a methodology, including placement and routing of cells, to generate two cell libraries: ASAP7 PDK and 16nm leading foundry commercial node one. The efforts are presented, as well as the difficulties and challenges we encountered are depicted.

Original languageEnglish
Title of host publication2023 International VLSI Symposium on Technology, Systems and Applications, VLSI-TSA/VLSI-DAT 2023 - Proceedings
PublisherInstitute of Electrical and Electronics Engineers Inc.
ISBN (Electronic)9798350334166
DOIs
StatePublished - 2023
Event2023 International VLSI Symposium on Technology, Systems and Applications, VLSI-TSA/VLSI-DAT 2023 - Hsinchu, Taiwan
Duration: 17 Apr 202320 Apr 2023

Publication series

Name2023 International VLSI Symposium on Technology, Systems and Applications, VLSI-TSA/VLSI-DAT 2023 - Proceedings

Conference

Conference2023 International VLSI Symposium on Technology, Systems and Applications, VLSI-TSA/VLSI-DAT 2023
Country/TerritoryTaiwan
CityHsinchu
Period17/04/2320/04/23

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