On-chip self-calibrated process-temperature sensor for TSV 3D integration

Tzu Ting Chiang*, Po-Tsang Huang, Ching Te Chuang, Kuan-Neng Chen, Jin-Chern Chiou, Kuo Hua Chen, Chi Tsung Chiu, Ho Ming Tong, Wei Hwang

*Corresponding author for this work

Research output: Chapter in Book/Report/Conference proceedingConference contributionpeer-review

4 Scopus citations


In TSV 3D integration, stacking multiple dies would face a severe challenge of the thermal stress and Vt scatter. In this paper, a fully on-chip self-calibrated process-temperature (PT) sensor is proposed to monitor the transistor variations (Vtn, Vtp) and temperature of the intra-die for 3D-ICs. The process information and temperature can be decoupled using the process-sensitive and temperature-dependent ring oscillators. Based on TSMC 65nm CMOS process, this sensor achieves 367.5 pJ per conversion, and the sensitivities of Vtn, Vtp and the inaccuracy of temperature are merely ±1.6mV, ±0.8mV, and ±1.5C, respectively.

Original languageEnglish
Title of host publicationProceedings - IEEE International SOC Conference, SOCC 2012
Number of pages6
StatePublished - 1 Dec 2012
Event25th IEEE International System-on-Chip Conference, SOCC 2012 - Niagara Falls, NY, United States
Duration: 12 Sep 201214 Sep 2012

Publication series

NameInternational System on Chip Conference
ISSN (Print)2164-1676
ISSN (Electronic)2164-1706


Conference25th IEEE International System-on-Chip Conference, SOCC 2012
Country/TerritoryUnited States
CityNiagara Falls, NY


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