On-chip ESD protection designs in RF integrated circuits for radio and wireless applications

Ming-Dou Ker; Chun Yu Lin

doi:10.1109/EDSSC.2013.6628166

On-chip ESD protection designs in RF integrated circuits for radio and wireless applications

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution › peer-review

Abstract

CMOS technology has been used to implement the radio and wireless integrated circuits. However, the thinner gate oxide in nanoscale CMOS technology seriously degrades the electrostatic discharge (ESD) robustness. Therefore, on-chip ESD protection designs must be added at all input/output pads in CMOS chip. To minimize the impacts from ESD protection design on circuit performances, ESD protection at input/output pads must be carefully designed. A review on ESD protection designs with low parasitic capacitance for radio and wireless applications is presented in this paper. The comparisons among these ESD protection designs are also discussed.

Original language	English
Title of host publication	2013 IEEE International Conference of Electron Devices and Solid-State Circuits, EDSSC 2013
DOIs	https://doi.org/10.1109/EDSSC.2013.6628166
State	Published - 23 Dec 2013
Event	2013 IEEE International Conference of Electron Devices and Solid-State Circuits, EDSSC 2013 - Hong Kong, Hong Kong Duration: 3 Jun 2013 → 5 Jun 2013

Publication series

Name	2013 IEEE International Conference of Electron Devices and Solid-State Circuits, EDSSC 2013

Conference

Conference	2013 IEEE International Conference of Electron Devices and Solid-State Circuits, EDSSC 2013
Country/Territory	Hong Kong
City	Hong Kong
Period	3/06/13 → 5/06/13

Keywords

Electrostatic discharge (ESD)
low capacitance
radio-frequency (RF)

Access to Document

10.1109/EDSSC.2013.6628166

Cite this

@inproceedings{2717cd850abb4240be13ac06e777602c,

title = "On-chip ESD protection designs in RF integrated circuits for radio and wireless applications",

abstract = "CMOS technology has been used to implement the radio and wireless integrated circuits. However, the thinner gate oxide in nanoscale CMOS technology seriously degrades the electrostatic discharge (ESD) robustness. Therefore, on-chip ESD protection designs must be added at all input/output pads in CMOS chip. To minimize the impacts from ESD protection design on circuit performances, ESD protection at input/output pads must be carefully designed. A review on ESD protection designs with low parasitic capacitance for radio and wireless applications is presented in this paper. The comparisons among these ESD protection designs are also discussed.",

keywords = "Electrostatic discharge (ESD), low capacitance, radio-frequency (RF)",

author = "Ming-Dou Ker and Lin, {Chun Yu}",

year = "2013",

month = dec,

day = "23",

doi = "10.1109/EDSSC.2013.6628166",

language = "English",

isbn = "9781467325233",

series = "2013 IEEE International Conference of Electron Devices and Solid-State Circuits, EDSSC 2013",

booktitle = "2013 IEEE International Conference of Electron Devices and Solid-State Circuits, EDSSC 2013",

note = "2013 IEEE International Conference of Electron Devices and Solid-State Circuits, EDSSC 2013 ; Conference date: 03-06-2013 Through 05-06-2013",

}

Ker, M-D & Lin, CY 2013, On-chip ESD protection designs in RF integrated circuits for radio and wireless applications. in 2013 IEEE International Conference of Electron Devices and Solid-State Circuits, EDSSC 2013., 6628166, 2013 IEEE International Conference of Electron Devices and Solid-State Circuits, EDSSC 2013, 2013 IEEE International Conference of Electron Devices and Solid-State Circuits, EDSSC 2013, Hong Kong, Hong Kong, 3/06/13. https://doi.org/10.1109/EDSSC.2013.6628166

On-chip ESD protection designs in RF integrated circuits for radio and wireless applications. / Ker, Ming-Dou; Lin, Chun Yu.
2013 IEEE International Conference of Electron Devices and Solid-State Circuits, EDSSC 2013. 2013. 6628166 (2013 IEEE International Conference of Electron Devices and Solid-State Circuits, EDSSC 2013).

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution › peer-review

TY - GEN

T1 - On-chip ESD protection designs in RF integrated circuits for radio and wireless applications

AU - Ker, Ming-Dou

AU - Lin, Chun Yu

PY - 2013/12/23

Y1 - 2013/12/23

N2 - CMOS technology has been used to implement the radio and wireless integrated circuits. However, the thinner gate oxide in nanoscale CMOS technology seriously degrades the electrostatic discharge (ESD) robustness. Therefore, on-chip ESD protection designs must be added at all input/output pads in CMOS chip. To minimize the impacts from ESD protection design on circuit performances, ESD protection at input/output pads must be carefully designed. A review on ESD protection designs with low parasitic capacitance for radio and wireless applications is presented in this paper. The comparisons among these ESD protection designs are also discussed.

AB - CMOS technology has been used to implement the radio and wireless integrated circuits. However, the thinner gate oxide in nanoscale CMOS technology seriously degrades the electrostatic discharge (ESD) robustness. Therefore, on-chip ESD protection designs must be added at all input/output pads in CMOS chip. To minimize the impacts from ESD protection design on circuit performances, ESD protection at input/output pads must be carefully designed. A review on ESD protection designs with low parasitic capacitance for radio and wireless applications is presented in this paper. The comparisons among these ESD protection designs are also discussed.

KW - Electrostatic discharge (ESD)

KW - low capacitance

KW - radio-frequency (RF)

UR - http://www.scopus.com/inward/record.url?scp=84890499289&partnerID=8YFLogxK

U2 - 10.1109/EDSSC.2013.6628166

DO - 10.1109/EDSSC.2013.6628166

M3 - Conference contribution

AN - SCOPUS:84890499289

SN - 9781467325233

T3 - 2013 IEEE International Conference of Electron Devices and Solid-State Circuits, EDSSC 2013

BT - 2013 IEEE International Conference of Electron Devices and Solid-State Circuits, EDSSC 2013

T2 - 2013 IEEE International Conference of Electron Devices and Solid-State Circuits, EDSSC 2013

Y2 - 3 June 2013 through 5 June 2013

ER -

On-chip ESD protection designs in RF integrated circuits for radio and wireless applications

Abstract

Publication series

Conference

Keywords

Access to Document

Other files and links

Fingerprint

Cite this