On-chip ESD protection design for GHz RF integrated circuits by using polysilicon diodes in sub-quarter-micron CMOS process

C. Y. Chang; Ming-Dou Ker

doi:10.1109/VTSA.2001.934529

On-chip ESD protection design for GHz RF integrated circuits by using polysilicon diodes in sub-quarter-micron CMOS process

C. Y. Chang^*, Ming-Dou Ker

^*Corresponding author for this work

Research output: Contribution to conference › Paper › peer-review

9 Scopus citations

Abstract

ESD protection in RF integrated circuits has several considerations: low parasitic capacitance, constant input capacitance, and insensitive to substrate coupling noise. In this paper, a new ESD protection design with polysilicon diodes for RF IC applications is proposed and characterized. The proposed polysilicon diode is constructed by polysilicon layer in a general CMOS process with a central un-doped region. The polysilicon diode with variation on the width of the central un-doped region is characterized at different temperatures. An on-chip ESD protection circuit realized with the stacked polysilicon diodes to reduce the total input capacitance for GHz RF application is demonstrated.

Original language	American English
Pages	240-243
Number of pages	4
DOIs	https://doi.org/10.1109/VTSA.2001.934529
State	Published - Apr 2001
Event	2001 International Symposium on VLSI Technology, Systems, and Applications, Proceedings - Hsinchu, Taiwan Duration: 18 Apr 2001 → 20 Apr 2001

Conference

Conference	2001 International Symposium on VLSI Technology, Systems, and Applications, Proceedings
Country/Territory	Taiwan
City	Hsinchu
Period	18/04/01 → 20/04/01

Access to Document

10.1109/VTSA.2001.934529

Cite this

@conference{65839b4545944adf8bdd59d28fecd0a3,

title = "On-chip ESD protection design for GHz RF integrated circuits by using polysilicon diodes in sub-quarter-micron CMOS process",

abstract = "ESD protection in RF integrated circuits has several considerations: low parasitic capacitance, constant input capacitance, and insensitive to substrate coupling noise. In this paper, a new ESD protection design with polysilicon diodes for RF IC applications is proposed and characterized. The proposed polysilicon diode is constructed by polysilicon layer in a general CMOS process with a central un-doped region. The polysilicon diode with variation on the width of the central un-doped region is characterized at different temperatures. An on-chip ESD protection circuit realized with the stacked polysilicon diodes to reduce the total input capacitance for GHz RF application is demonstrated.",

author = "Chang, {C. Y.} and Ming-Dou Ker",

year = "2001",

month = apr,

doi = "10.1109/VTSA.2001.934529",

language = "American English",

pages = "240--243",

note = "2001 International Symposium on VLSI Technology, Systems, and Applications, Proceedings ; Conference date: 18-04-2001 Through 20-04-2001",

}

TY - CONF

T1 - On-chip ESD protection design for GHz RF integrated circuits by using polysilicon diodes in sub-quarter-micron CMOS process

AU - Chang, C. Y.

AU - Ker, Ming-Dou

PY - 2001/4

Y1 - 2001/4

N2 - ESD protection in RF integrated circuits has several considerations: low parasitic capacitance, constant input capacitance, and insensitive to substrate coupling noise. In this paper, a new ESD protection design with polysilicon diodes for RF IC applications is proposed and characterized. The proposed polysilicon diode is constructed by polysilicon layer in a general CMOS process with a central un-doped region. The polysilicon diode with variation on the width of the central un-doped region is characterized at different temperatures. An on-chip ESD protection circuit realized with the stacked polysilicon diodes to reduce the total input capacitance for GHz RF application is demonstrated.

AB - ESD protection in RF integrated circuits has several considerations: low parasitic capacitance, constant input capacitance, and insensitive to substrate coupling noise. In this paper, a new ESD protection design with polysilicon diodes for RF IC applications is proposed and characterized. The proposed polysilicon diode is constructed by polysilicon layer in a general CMOS process with a central un-doped region. The polysilicon diode with variation on the width of the central un-doped region is characterized at different temperatures. An on-chip ESD protection circuit realized with the stacked polysilicon diodes to reduce the total input capacitance for GHz RF application is demonstrated.

UR - http://www.scopus.com/inward/record.url?scp=0034854567&partnerID=8YFLogxK

U2 - 10.1109/VTSA.2001.934529

DO - 10.1109/VTSA.2001.934529

M3 - Paper

AN - SCOPUS:0034854567

SP - 240

EP - 243

T2 - 2001 International Symposium on VLSI Technology, Systems, and Applications, Proceedings

Y2 - 18 April 2001 through 20 April 2001

ER -

On-chip ESD protection design for GHz RF integrated circuits by using polysilicon diodes in sub-quarter-micron CMOS process

Abstract

Conference

Access to Document

Other files and links

Fingerprint

Cite this