On-chip ESD protection design for GHz RF integrated circuits by using polysilicon diodes in sub-quarter-micron CMOS process

C. Y. Chang*, Ming-Dou Ker

*Corresponding author for this work

    Research output: Contribution to conferencePaperpeer-review

    8 Scopus citations

    Abstract

    ESD protection in RF integrated circuits has several considerations: low parasitic capacitance, constant input capacitance, and insensitive to substrate coupling noise. In this paper, a new ESD protection design with polysilicon diodes for RF IC applications is proposed and characterized. The proposed polysilicon diode is constructed by polysilicon layer in a general CMOS process with a central un-doped region. The polysilicon diode with variation on the width of the central un-doped region is characterized at different temperatures. An on-chip ESD protection circuit realized with the stacked polysilicon diodes to reduce the total input capacitance for GHz RF application is demonstrated.

    Original languageAmerican English
    Pages240-243
    Number of pages4
    DOIs
    StatePublished - Apr 2001
    Event2001 International Symposium on VLSI Technology, Systems, and Applications, Proceedings - Hsinchu, Taiwan
    Duration: 18 Apr 200120 Apr 2001

    Conference

    Conference2001 International Symposium on VLSI Technology, Systems, and Applications, Proceedings
    Country/TerritoryTaiwan
    CityHsinchu
    Period18/04/0120/04/01

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