TY - GEN
T1 - Offline and Time-variant EVD-based Closed-loop Digital Predistortion Design for Sub-THz Power Amplifier Array in Basedband Transmitter
AU - Tu, Chung Lun
AU - Chang, Chin Ming
AU - Jou, Shyh Jye
N1 - Publisher Copyright:
© 2023 IEEE.
PY - 2023
Y1 - 2023
N2 - In this paper, we propose an eigenvalue decomposition (EVD) based digital predistortion (DPD) design for nonlinear memory PAs in active antenna array structure with offline and time-variant scenario. The simulation environment incorporates various non-ideal effects based on IEEE Std 802.15.3d, the transmitter error vector magnitude (TX EVM) performance can be improved from -9.07dB to -20.64 dB in the presence of the proposed DPD. Furthermore, since the characteristics of the sub-THz power amplifiers are sensitive to temperature changes, we simulate the impact when the temperature rises from 27 °C to 125°C. This leads to inaccurate offline estimation, while with the proposed online tracking mechanism, the TX EVM can be improved from -13.34 dB to -20.05 dB. For the hardware implementation, we use 16-nm FinFET CMOS process with eight times parallelism architecture to achieve a data transmission with a bandwidth of 7.04GHz. The core area and power are 0.106 mm2 and 464.8 mW for the TX DPD, and 0.0576 mm2 and 252.0 mW for the receiver optimizer, respectively.
AB - In this paper, we propose an eigenvalue decomposition (EVD) based digital predistortion (DPD) design for nonlinear memory PAs in active antenna array structure with offline and time-variant scenario. The simulation environment incorporates various non-ideal effects based on IEEE Std 802.15.3d, the transmitter error vector magnitude (TX EVM) performance can be improved from -9.07dB to -20.64 dB in the presence of the proposed DPD. Furthermore, since the characteristics of the sub-THz power amplifiers are sensitive to temperature changes, we simulate the impact when the temperature rises from 27 °C to 125°C. This leads to inaccurate offline estimation, while with the proposed online tracking mechanism, the TX EVM can be improved from -13.34 dB to -20.05 dB. For the hardware implementation, we use 16-nm FinFET CMOS process with eight times parallelism architecture to achieve a data transmission with a bandwidth of 7.04GHz. The core area and power are 0.106 mm2 and 464.8 mW for the TX DPD, and 0.0576 mm2 and 252.0 mW for the receiver optimizer, respectively.
KW - antenna array
KW - digital predistortion
KW - power amplifier
KW - sub-terahertz
UR - http://www.scopus.com/inward/record.url?scp=85167728143&partnerID=8YFLogxK
U2 - 10.1109/ISCAS46773.2023.10181699
DO - 10.1109/ISCAS46773.2023.10181699
M3 - Conference contribution
AN - SCOPUS:85167728143
T3 - Proceedings - IEEE International Symposium on Circuits and Systems
BT - ISCAS 2023 - 56th IEEE International Symposium on Circuits and Systems, Proceedings
PB - Institute of Electrical and Electronics Engineers Inc.
T2 - 56th IEEE International Symposium on Circuits and Systems, ISCAS 2023
Y2 - 21 May 2023 through 25 May 2023
ER -