OEE improvement by pogo pin defect detection in wafer probing process

Woonyoung Yeo*, Yung-Chia Chang, Wayne Liu

*Corresponding author for this work

Research output: Contribution to journalArticlepeer-review

4 Scopus citations

Abstract

It is usually very difficult to find the causes of low yield performance in semiconductor manufacturing. In a typical wafer probing process, when the yield is low, engineers are required to examine both the equipment and the products to clarify if the low yield performance could be contributed by the testing conditions or the products. No matter which were the main cause, the time-consuming trouble-shooting process itself demanded resources thus the overall equipment effectiveness (OEE) is also damaged. This paper dealt with the trouble shooting data of wafer probing process. By examining the main factors that may affect the yield and equipment downtime in the wafer probing process, this study conducted various experiments to explore the relationship between yield and various wafer probing settings such as cleaning sheet size, probing overdrive, touch down time, and contact resistance. As a results, the optimal conditions of the main factors for improving yield and OEE are presented.

Original languageEnglish
Pages (from-to)3111–3123
Number of pages13
JournalMicrosystem Technologies
Volume27
Issue number8
DOIs
StatePublished - Aug 2021

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