Novel GAA raised source / drain sub-10-nm poly-Si NW channel TFTs with self-aligned corked gate structure for 3-D IC applications

Yi Hsien Lu; Po Yi Kuo; Yi Hong Wu; Yi Hsuan Chen; Tien-Sheng Chao

Novel GAA raised source / drain sub-10-nm poly-Si NW channel TFTs with self-aligned corked gate structure for 3-D IC applications

Yi Hsien Lu^*, Po Yi Kuo, Yi Hong Wu, Yi Hsuan Chen, Tien-Sheng Chao

^*Corresponding author for this work

Department of Electrophysics

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution › peer-review

25 Scopus citations

Abstract

A novel gate-all-around raised source / drain sub-10-nm poly-Si nanowire (NW) channel TFTs with self-aligned corked gate structure (GAA RSDNW-TFTs) have been successfully demonstrated. It is through the use of a novel fabrication process requiring no advanced lithographic tools. The corked gate (CG) structure, only the poly gate pattern was etched, reduces complex of process significantly. For the first time, several properties of this 3D architecture are explored: (i) the Si NW dimension is about 7 nm x 12 nm and a superior smooth elliptical shape is obtained in the category of poly-Si NW TFTs. (ii) the temperature dependence and the instability under PBTI stress of the main electrical parameters are proposed.

Original language	English
Title of host publication	2011 Symposium on VLSI Technology, VLSIT 2011 - Digest of Technical Papers
Pages	142-143
Number of pages	2
State	Published - 16 Sep 2011
Event	2011 Symposium on VLSI Technology, VLSIT 2011 - Kyoto, Japan Duration: 14 Jun 2011 → 16 Jun 2011

Publication series

Name	Digest of Technical Papers - Symposium on VLSI Technology
ISSN (Print)	0743-1562

Conference

Conference	2011 Symposium on VLSI Technology, VLSIT 2011
Country/Territory	Japan
City	Kyoto
Period	14/06/11 → 16/06/11

Cite this

@inproceedings{e5fcf8d07c564cacb197be294caafbe9,

title = "Novel GAA raised source / drain sub-10-nm poly-Si NW channel TFTs with self-aligned corked gate structure for 3-D IC applications",

abstract = "A novel gate-all-around raised source / drain sub-10-nm poly-Si nanowire (NW) channel TFTs with self-aligned corked gate structure (GAA RSDNW-TFTs) have been successfully demonstrated. It is through the use of a novel fabrication process requiring no advanced lithographic tools. The corked gate (CG) structure, only the poly gate pattern was etched, reduces complex of process significantly. For the first time, several properties of this 3D architecture are explored: (i) the Si NW dimension is about 7 nm x 12 nm and a superior smooth elliptical shape is obtained in the category of poly-Si NW TFTs. (ii) the temperature dependence and the instability under PBTI stress of the main electrical parameters are proposed.",

author = "Lu, {Yi Hsien} and Kuo, {Po Yi} and Wu, {Yi Hong} and Chen, {Yi Hsuan} and Tien-Sheng Chao",

year = "2011",

month = sep,

day = "16",

language = "English",

isbn = "9784863481640",

series = "Digest of Technical Papers - Symposium on VLSI Technology",

pages = "142--143",

booktitle = "2011 Symposium on VLSI Technology, VLSIT 2011 - Digest of Technical Papers",

note = "2011 Symposium on VLSI Technology, VLSIT 2011 ; Conference date: 14-06-2011 Through 16-06-2011",

}

Lu, YH, Kuo, PY, Wu, YH, Chen, YH & Chao, T-S 2011, Novel GAA raised source / drain sub-10-nm poly-Si NW channel TFTs with self-aligned corked gate structure for 3-D IC applications. in 2011 Symposium on VLSI Technology, VLSIT 2011 - Digest of Technical Papers., 5984675, Digest of Technical Papers - Symposium on VLSI Technology, pp. 142-143, 2011 Symposium on VLSI Technology, VLSIT 2011, Kyoto, Japan, 14/06/11.

Novel GAA raised source / drain sub-10-nm poly-Si NW channel TFTs with self-aligned corked gate structure for 3-D IC applications. / Lu, Yi Hsien; Kuo, Po Yi; Wu, Yi Hong et al.
2011 Symposium on VLSI Technology, VLSIT 2011 - Digest of Technical Papers. 2011. p. 142-143 5984675 (Digest of Technical Papers - Symposium on VLSI Technology).

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution › peer-review

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T1 - Novel GAA raised source / drain sub-10-nm poly-Si NW channel TFTs with self-aligned corked gate structure for 3-D IC applications

AU - Lu, Yi Hsien

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AU - Chen, Yi Hsuan

AU - Chao, Tien-Sheng

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N2 - A novel gate-all-around raised source / drain sub-10-nm poly-Si nanowire (NW) channel TFTs with self-aligned corked gate structure (GAA RSDNW-TFTs) have been successfully demonstrated. It is through the use of a novel fabrication process requiring no advanced lithographic tools. The corked gate (CG) structure, only the poly gate pattern was etched, reduces complex of process significantly. For the first time, several properties of this 3D architecture are explored: (i) the Si NW dimension is about 7 nm x 12 nm and a superior smooth elliptical shape is obtained in the category of poly-Si NW TFTs. (ii) the temperature dependence and the instability under PBTI stress of the main electrical parameters are proposed.

AB - A novel gate-all-around raised source / drain sub-10-nm poly-Si nanowire (NW) channel TFTs with self-aligned corked gate structure (GAA RSDNW-TFTs) have been successfully demonstrated. It is through the use of a novel fabrication process requiring no advanced lithographic tools. The corked gate (CG) structure, only the poly gate pattern was etched, reduces complex of process significantly. For the first time, several properties of this 3D architecture are explored: (i) the Si NW dimension is about 7 nm x 12 nm and a superior smooth elliptical shape is obtained in the category of poly-Si NW TFTs. (ii) the temperature dependence and the instability under PBTI stress of the main electrical parameters are proposed.

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BT - 2011 Symposium on VLSI Technology, VLSIT 2011 - Digest of Technical Papers

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ER -

Novel GAA raised source / drain sub-10-nm poly-Si NW channel TFTs with self-aligned corked gate structure for 3-D IC applications

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