Abstract
In this paper, full-depleted SOI devices with source/drain extension shift and high-K offset spacer were investigated in detail. The calculated results show that the source/drain extension shift can decrease off-state leakage current Ioff significantly by utilizing the extra electron barrier height in source/drain extension shift region to reduce standby power dissipation. However, the on-state driving current Ion is also sacrificing simultaneously. In order to overcome this drawback, the high-κ offset spacer is used to increase the on-state driving current Ion effectively due to the enhanced vertical fringing electric field to elevate the channel voltage drop and reduce series resistance. Consequently, a nanoscale FD SOI device with 8-nm S/D extension shift and TiO2 offset spacer can possess high driving current Ion and ultra-low leakage current I off about 0.003 times lower than conventional SOI structure.
Original language | English |
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Pages | 59-62 |
Number of pages | 4 |
State | Published - May 2006 |
Event | 2006 NSTI Nanotechnology Conference and Trade Show - NSTI Nanotech 2006 Technical Proceedings - Boston, MA, United States Duration: 7 May 2006 → 11 May 2006 |
Conference
Conference | 2006 NSTI Nanotechnology Conference and Trade Show - NSTI Nanotech 2006 Technical Proceedings |
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Country/Territory | United States |
City | Boston, MA |
Period | 7/05/06 → 11/05/06 |
Keywords
- Fringing electric field
- High-κ offset spacer dielectric
- S/D extension shift
- Silicon-on-insulator (SOI)