Novel electroless copper plating as gate electrodes for a-TFTs AMLCD application

Chih Yu Su, Yi Teh Chou, Po-Tsun Liu*, Hung Ming Chen

*Corresponding author for this work

Research output: Contribution to conferencePaperpeer-review

Abstract

A novel method for depositing low-cost and high-quality electro-less plating (ELP) copper film has been realized to fabricate copper-gate thin film transistors in this work. The electro-less NiP serves as an adhesion layer on glass substrate first and then the copper films are self-aligned on it. All processes of gate electrodes are fabricated under ambient environment. Electrical characteristics of the inverse staggered amorphous silicon thin film transistors (a-TFTs) are studied comprehensively. The threshold voltage is about 3.55V and the filed mobility is up to 0.56 at VD=7.67V.

Original languageEnglish
StatePublished - 2009
Event2009 International Display Manufacturing Conference, 3D Systems and Applications, and Asia Display, IDMC/3DSA/Asia Display 2009 - Taipei, Taiwan
Duration: 27 Apr 200930 Apr 2009

Conference

Conference2009 International Display Manufacturing Conference, 3D Systems and Applications, and Asia Display, IDMC/3DSA/Asia Display 2009
Country/TerritoryTaiwan
CityTaipei
Period27/04/0930/04/09

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