Novel Complementary FeFET- based Lookup Table and Routing Switch Design and their Applications in Energy/Area-Efficient FPGA

Yuan Yu Huang, Po Tsang Huang, Po Yi Lee, Pin Su

Research output: Chapter in Book/Report/Conference proceedingConference contributionpeer-review

Abstract

This work explores the potential of voltage-mode complementary ferroelectric FET (CFeFET) to realize energy/area-efficient nonvolatile logics for both memory-intensive and computation-intensive applications. CFeFET can be constructed by a p-type FeFET stacking on a n-type FeFET with only one transistor's footprint. Each single CFeFET can be utilized as a 1-bit storage element and a 2-to-1 multiplexer without any short currents. Moreover, leakage current is further reduced due to higher Vth of unselected n-FeFET or p-FeFET. Additionally, we further demonstrate FPGA building blocks using the CFeFET. Our simulation results show that the CFeFET can achieve superior Power-Performance-Area (PPA) when compared to the same designs implemented by SRAM or current-mode FeFET.

Original languageEnglish
Title of host publication7th IEEE Electron Devices Technology and Manufacturing Conference
Subtitle of host publicationStrengthen the Global Semiconductor Research Collaboration After the Covid-19 Pandemic, EDTM 2023
PublisherInstitute of Electrical and Electronics Engineers Inc.
ISBN (Electronic)9798350332520
DOIs
StatePublished - 2023
Event7th IEEE Electron Devices Technology and Manufacturing Conference, EDTM 2023 - Seoul, Korea, Republic of
Duration: 7 Mar 202310 Mar 2023

Publication series

Name7th IEEE Electron Devices Technology and Manufacturing Conference: Strengthen the Global Semiconductor Research Collaboration After the Covid-19 Pandemic, EDTM 2023

Conference

Conference7th IEEE Electron Devices Technology and Manufacturing Conference, EDTM 2023
Country/TerritoryKorea, Republic of
CitySeoul
Period7/03/2310/03/23

Keywords

  • CFET
  • FeFET
  • FPGA
  • Lookup table
  • Routing switch

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