Abstract
A simple and highly efficient successive-approximation registers (SAR) ADC realisation is proposed. It requires an opamp, a comparator and only three equal-valued capacitors. The proposed scheme is insensitive to the capacitor parasitics, and has a small capacitance spread. With an oversampled scheme, it also allows noise-shaping the remaining quantisation error. It is well-suited for low-frequency instrumentation and measurement applications, and for use in extended-counting ADCs.
Original language | English |
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Pages (from-to) | 182-184 |
Number of pages | 3 |
Journal | Electronics Letters |
Volume | 49 |
Issue number | 3 |
DOIs | |
State | Published - 31 Jan 2013 |