New serial architecture for the Berlekamp-Massey algorithm

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Abstract

We propose a new efficient serial architecture to implement the Berlekamp-Massey algorithm, which is frequently used in BCH and Reed-Solomon decoders. An inversionless Berlekamp-Massey algorithm is adopted which not only eliminates the finite-field inverter but also introduces additional parallelism. We discover a clever scheduling of three finite-field multipliers to implement the algorithm very efficiently. Compared to a previously proposed serial Berlekamp-Massey architecture, our technique significantly reduces the latency.

Original languageEnglish
Pages (from-to)481-483
Number of pages3
JournalIEEE Transactions on Communications
Volume47
Issue number4
DOIs
StatePublished - 1 Jan 1999

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