New layout scheme to improve ESD robustness of I/O buffers in fully-silicided CMOS process

Ming-Dou Ker*, Wen Yi Chen, Wuu Trong Shieh, I. Ju Wei

*Corresponding author for this work

    Research output: Chapter in Book/Report/Conference proceedingConference contributionpeer-review

    2 Scopus citations

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    Earth and Planetary Sciences

    Engineering

    Material Science