New experimental methodology to extract compact layout rules for latchup prevention in bulk CMOS IC's

Ming-Dou Ker; Wen Yu Lo; Chung-Yu Wu

doi:10.1109/CICC.1999.777261

New experimental methodology to extract compact layout rules for latchup prevention in bulk CMOS IC's

Ming-Dou Ker^*, Wen Yu Lo, Chung-Yu Wu

^*Corresponding author for this work

Institute of Electronics

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution › peer-review

8 Scopus citations

Abstract

A new experimental methodology to find the compact layout rules on guard rings is proposed to increase latchup immunity of bulk CMOS IC's. The layout rules are extracted from the experimental testchips with the latchup sensors and different drawing spacings. A new latchup prevention design with additional internal guard rings between the I/O cells and the internal circuits is first investigated in the fabricated experimental testchips. Through detailed experimental verification including temperature effect, one set of compact layout rules has been established to save the chip size of the pad-limited CMOS IC's but still with enough latchup immunity in a 0.5-μm bulk CMOS technology.

Original language	English
Title of host publication	Proceedings of the Custom Integrated Circuits Conference
Publisher	IEEE
Pages	143-146
Number of pages	4
ISBN (Print)	0780354443
DOIs	https://doi.org/10.1109/CICC.1999.777261
State	Published - 1999
Event	Proceedings of the 1999 21st IEEE Annual Custom Integrated Circuits Conference, CICC '99 - San Diego, CA, USA Duration: 16 May 1999 → 19 May 1999

Publication series

Name	Proceedings of the Custom Integrated Circuits Conference
ISSN (Print)	0886-5930

Conference

Conference	Proceedings of the 1999 21st IEEE Annual Custom Integrated Circuits Conference, CICC '99
City	San Diego, CA, USA
Period	16/05/99 → 19/05/99

Access to Document

10.1109/CICC.1999.777261

Cite this

@inproceedings{a1a905ef28cb4070a436ab568628f794,

title = "New experimental methodology to extract compact layout rules for latchup prevention in bulk CMOS IC's",

abstract = "A new experimental methodology to find the compact layout rules on guard rings is proposed to increase latchup immunity of bulk CMOS IC's. The layout rules are extracted from the experimental testchips with the latchup sensors and different drawing spacings. A new latchup prevention design with additional internal guard rings between the I/O cells and the internal circuits is first investigated in the fabricated experimental testchips. Through detailed experimental verification including temperature effect, one set of compact layout rules has been established to save the chip size of the pad-limited CMOS IC's but still with enough latchup immunity in a 0.5-μm bulk CMOS technology.",

author = "Ming-Dou Ker and Lo, {Wen Yu} and Chung-Yu Wu",

year = "1999",

doi = "10.1109/CICC.1999.777261",

language = "English",

isbn = "0780354443",

series = "Proceedings of the Custom Integrated Circuits Conference",

publisher = "IEEE",

pages = "143--146",

booktitle = "Proceedings of the Custom Integrated Circuits Conference",

note = "Proceedings of the 1999 21st IEEE Annual Custom Integrated Circuits Conference, CICC '99 ; Conference date: 16-05-1999 Through 19-05-1999",

}

Ker, M-D, Lo, WY & Wu, C-Y 1999, New experimental methodology to extract compact layout rules for latchup prevention in bulk CMOS IC's. in Proceedings of the Custom Integrated Circuits Conference. Proceedings of the Custom Integrated Circuits Conference, IEEE, pp. 143-146, Proceedings of the 1999 21st IEEE Annual Custom Integrated Circuits Conference, CICC '99, San Diego, CA, USA, 16/05/99. https://doi.org/10.1109/CICC.1999.777261

New experimental methodology to extract compact layout rules for latchup prevention in bulk CMOS IC's. / Ker, Ming-Dou; Lo, Wen Yu; Wu, Chung-Yu.
Proceedings of the Custom Integrated Circuits Conference. IEEE, 1999. p. 143-146 (Proceedings of the Custom Integrated Circuits Conference).

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution › peer-review

TY - GEN

T1 - New experimental methodology to extract compact layout rules for latchup prevention in bulk CMOS IC's

AU - Ker, Ming-Dou

AU - Lo, Wen Yu

AU - Wu, Chung-Yu

PY - 1999

Y1 - 1999

N2 - A new experimental methodology to find the compact layout rules on guard rings is proposed to increase latchup immunity of bulk CMOS IC's. The layout rules are extracted from the experimental testchips with the latchup sensors and different drawing spacings. A new latchup prevention design with additional internal guard rings between the I/O cells and the internal circuits is first investigated in the fabricated experimental testchips. Through detailed experimental verification including temperature effect, one set of compact layout rules has been established to save the chip size of the pad-limited CMOS IC's but still with enough latchup immunity in a 0.5-μm bulk CMOS technology.

AB - A new experimental methodology to find the compact layout rules on guard rings is proposed to increase latchup immunity of bulk CMOS IC's. The layout rules are extracted from the experimental testchips with the latchup sensors and different drawing spacings. A new latchup prevention design with additional internal guard rings between the I/O cells and the internal circuits is first investigated in the fabricated experimental testchips. Through detailed experimental verification including temperature effect, one set of compact layout rules has been established to save the chip size of the pad-limited CMOS IC's but still with enough latchup immunity in a 0.5-μm bulk CMOS technology.

UR - http://www.scopus.com/inward/record.url?scp=0032597876&partnerID=8YFLogxK

U2 - 10.1109/CICC.1999.777261

DO - 10.1109/CICC.1999.777261

M3 - Conference contribution

AN - SCOPUS:0032597876

SN - 0780354443

T3 - Proceedings of the Custom Integrated Circuits Conference

SP - 143

EP - 146

BT - Proceedings of the Custom Integrated Circuits Conference

PB - IEEE

T2 - Proceedings of the 1999 21st IEEE Annual Custom Integrated Circuits Conference, CICC '99

Y2 - 16 May 1999 through 19 May 1999

ER -

New experimental methodology to extract compact layout rules for latchup prevention in bulk CMOS IC's

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