New diode string design with very low leakage current for using in power supply ESD clamp circuits

Ming-Dou Ker; Wen Yu Lo; Hun Hsien Chang

doi:10.1109/ISCAS.2000.857365

New diode string design with very low leakage current for using in power supply ESD clamp circuits

Ming-Dou Ker^*, Wen Yu Lo, Hun Hsien Chang

^*Corresponding author for this work

Research output: Contribution to journal › Conference article › peer-review

Abstract

A new diode string design with very low leakage current is proposed for using in the on-chip power supply ESD (electrostatic discharge) clamp circuits. Three traditional designs of the stacked diode strings used in the power supply ESD clamp circuits are also fabricated in the same test chip to verify the improvement of this new design. By adding an NMOS-controlled lateral SCR (NCLSCR) device into the stacked diode string, the leakage current of this new proposed diode string with 6 stacked diodes under a 5-V (3.3-V) forward bias condition can be controlled below 2.1 (1.07) nA at an environment temperature of 125 °C. The blocking voltage of this new diode string design with NCLSCR can be linearly adjusted by simply changing the number of the stacked diodes in the diode string for application across the power lines with different voltage levels to achieve the whole-chip ESD protection scheme.

Original language	English
Article number	857365
Pages (from-to)	69-72
Number of pages	4
Journal	Proceedings - IEEE International Symposium on Circuits and Systems
Volume	5
DOIs	https://doi.org/10.1109/ISCAS.2000.857365
State	Published - 28 May 2000
Event	Proceedings of the IEEE 2000 International Symposium on Circuits and Systems - Geneva, Switz Duration: 28 May 2000 → 31 May 2000

Access to Document

10.1109/ISCAS.2000.857365

Cite this

@article{8b9c723a89514be28ac537c1aef884bd,

title = "New diode string design with very low leakage current for using in power supply ESD clamp circuits",

abstract = "A new diode string design with very low leakage current is proposed for using in the on-chip power supply ESD (electrostatic discharge) clamp circuits. Three traditional designs of the stacked diode strings used in the power supply ESD clamp circuits are also fabricated in the same test chip to verify the improvement of this new design. By adding an NMOS-controlled lateral SCR (NCLSCR) device into the stacked diode string, the leakage current of this new proposed diode string with 6 stacked diodes under a 5-V (3.3-V) forward bias condition can be controlled below 2.1 (1.07) nA at an environment temperature of 125 °C. The blocking voltage of this new diode string design with NCLSCR can be linearly adjusted by simply changing the number of the stacked diodes in the diode string for application across the power lines with different voltage levels to achieve the whole-chip ESD protection scheme.",

author = "Ming-Dou Ker and Lo, {Wen Yu} and Chang, {Hun Hsien}",

year = "2000",

month = may,

day = "28",

doi = "10.1109/ISCAS.2000.857365",

language = "English",

volume = "5",

pages = "69--72",

journal = "Proceedings - IEEE International Symposium on Circuits and Systems",

issn = "0271-4310",

publisher = "Institute of Electrical and Electronics Engineers Inc.",

note = "null ; Conference date: 28-05-2000 Through 31-05-2000",

}

TY - JOUR

T1 - New diode string design with very low leakage current for using in power supply ESD clamp circuits

AU - Ker, Ming-Dou

AU - Lo, Wen Yu

AU - Chang, Hun Hsien

PY - 2000/5/28

Y1 - 2000/5/28

N2 - A new diode string design with very low leakage current is proposed for using in the on-chip power supply ESD (electrostatic discharge) clamp circuits. Three traditional designs of the stacked diode strings used in the power supply ESD clamp circuits are also fabricated in the same test chip to verify the improvement of this new design. By adding an NMOS-controlled lateral SCR (NCLSCR) device into the stacked diode string, the leakage current of this new proposed diode string with 6 stacked diodes under a 5-V (3.3-V) forward bias condition can be controlled below 2.1 (1.07) nA at an environment temperature of 125 °C. The blocking voltage of this new diode string design with NCLSCR can be linearly adjusted by simply changing the number of the stacked diodes in the diode string for application across the power lines with different voltage levels to achieve the whole-chip ESD protection scheme.

AB - A new diode string design with very low leakage current is proposed for using in the on-chip power supply ESD (electrostatic discharge) clamp circuits. Three traditional designs of the stacked diode strings used in the power supply ESD clamp circuits are also fabricated in the same test chip to verify the improvement of this new design. By adding an NMOS-controlled lateral SCR (NCLSCR) device into the stacked diode string, the leakage current of this new proposed diode string with 6 stacked diodes under a 5-V (3.3-V) forward bias condition can be controlled below 2.1 (1.07) nA at an environment temperature of 125 °C. The blocking voltage of this new diode string design with NCLSCR can be linearly adjusted by simply changing the number of the stacked diodes in the diode string for application across the power lines with different voltage levels to achieve the whole-chip ESD protection scheme.

UR - http://www.scopus.com/inward/record.url?scp=0033717381&partnerID=8YFLogxK

U2 - 10.1109/ISCAS.2000.857365

DO - 10.1109/ISCAS.2000.857365

M3 - Conference article

AN - SCOPUS:0033717381

SN - 0271-4310

VL - 5

SP - 69

EP - 72

JO - Proceedings - IEEE International Symposium on Circuits and Systems

JF - Proceedings - IEEE International Symposium on Circuits and Systems

M1 - 857365

Y2 - 28 May 2000 through 31 May 2000

ER -

New diode string design with very low leakage current for using in power supply ESD clamp circuits

Abstract

Access to Document

Other files and links

Fingerprint

Cite this