Multichip module based RISC processor with programmable hardware

Michael Newell; Wai-Chi  Fang; Richard Johannesson; Leon Alkalai

doi:10.1109/ASIC.1995.580695

Multichip module based RISC processor with programmable hardware

Michael Newell^*, Wai-Chi Fang, Richard Johannesson, Leon Alkalai

^*Corresponding author for this work

Institute of Electronics

Research output: Contribution to journal › Conference article › peer-review

Abstract

A multichip module (MCM) based RISC processor with programmable hardware has been developed for the new era of miniaturized spacecraft required for NASA's 'faster, better, cheaper' missions. The MCM based processor incorporates a complete 32-bit RISC computer including RAM, EEPROM and programmable hardware. This paper describes the system architecture and its associated MCM design and implementation. It also explores the architectural merits of including user programmable hardware.

Original language	English
Pages (from-to)	119-122
Number of pages	4
Journal	Proceedings of the Annual IEEE International ASIC Conference and Exhibit
DOIs	https://doi.org/10.1109/ASIC.1995.580695
State	Published - 1 Dec 1995
Event	Proceedings of the 8th Annual IEEE International ASIC Conference and Exhibit - Austin, TX, USA Duration: 18 Sep 1995 → 22 Sep 1995

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10.1109/ASIC.1995.580695

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title = "Multichip module based RISC processor with programmable hardware",

abstract = "A multichip module (MCM) based RISC processor with programmable hardware has been developed for the new era of miniaturized spacecraft required for NASA's 'faster, better, cheaper' missions. The MCM based processor incorporates a complete 32-bit RISC computer including RAM, EEPROM and programmable hardware. This paper describes the system architecture and its associated MCM design and implementation. It also explores the architectural merits of including user programmable hardware.",

author = "Michael Newell and Wai-Chi Fang and Richard Johannesson and Leon Alkalai",

year = "1995",

month = dec,

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doi = "10.1109/ASIC.1995.580695",

language = "English",

pages = "119--122",

journal = "Proceedings of the Annual IEEE International ASIC Conference and Exhibit",

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note = "Proceedings of the 8th Annual IEEE International ASIC Conference and Exhibit ; Conference date: 18-09-1995 Through 22-09-1995",

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AU - Newell, Michael

AU - Fang, Wai-Chi

AU - Johannesson, Richard

AU - Alkalai, Leon

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Y1 - 1995/12/1

N2 - A multichip module (MCM) based RISC processor with programmable hardware has been developed for the new era of miniaturized spacecraft required for NASA's 'faster, better, cheaper' missions. The MCM based processor incorporates a complete 32-bit RISC computer including RAM, EEPROM and programmable hardware. This paper describes the system architecture and its associated MCM design and implementation. It also explores the architectural merits of including user programmable hardware.

AB - A multichip module (MCM) based RISC processor with programmable hardware has been developed for the new era of miniaturized spacecraft required for NASA's 'faster, better, cheaper' missions. The MCM based processor incorporates a complete 32-bit RISC computer including RAM, EEPROM and programmable hardware. This paper describes the system architecture and its associated MCM design and implementation. It also explores the architectural merits of including user programmable hardware.

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U2 - 10.1109/ASIC.1995.580695

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M3 - Conference article

AN - SCOPUS:0029542093

SN - 1063-0988

SP - 119

EP - 122

JO - Proceedings of the Annual IEEE International ASIC Conference and Exhibit

JF - Proceedings of the Annual IEEE International ASIC Conference and Exhibit

T2 - Proceedings of the 8th Annual IEEE International ASIC Conference and Exhibit

Y2 - 18 September 1995 through 22 September 1995

ER -

Multichip module based RISC processor with programmable hardware

Abstract

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