TY - GEN
T1 - Multi-Target many-reactant sample preparation for reactant minimization on microfluidic biochips
AU - Lei, Yung Chun
AU - Lin, Tien Kuo
AU - Huang, Juinn-Dar
N1 - Publisher Copyright:
© 2018 IEEE.
PY - 2018/8/7
Y1 - 2018/8/7
N2 - Sample preparation is one of essential steps in biochemical applications. It produces solutions with target concentrations through mixing various reactants in a specific way. In this paper, we propose a reactant cost minimization technique, M2SPA, for multi-Target many-reactant sample preparation on microfluidic biochips through maximally sharing identical intermediate solutions among different targets. M2SPA first represents target concentrations as a recipe cube, searches all feasible candidates for intermediate solution sharing among targets, and then selects the one with the best cost saving for action. Experimental results show that the proposed algorithm can reduce up to 15.7% of reactant cost as compared to a state-of-The-Art method.
AB - Sample preparation is one of essential steps in biochemical applications. It produces solutions with target concentrations through mixing various reactants in a specific way. In this paper, we propose a reactant cost minimization technique, M2SPA, for multi-Target many-reactant sample preparation on microfluidic biochips through maximally sharing identical intermediate solutions among different targets. M2SPA first represents target concentrations as a recipe cube, searches all feasible candidates for intermediate solution sharing among targets, and then selects the one with the best cost saving for action. Experimental results show that the proposed algorithm can reduce up to 15.7% of reactant cost as compared to a state-of-The-Art method.
KW - Microfluidic biochips
KW - Reactant minimization
KW - Sample preparation
UR - http://www.scopus.com/inward/record.url?scp=85052148949&partnerID=8YFLogxK
U2 - 10.1109/ISVLSI.2018.00124
DO - 10.1109/ISVLSI.2018.00124
M3 - Conference contribution
AN - SCOPUS:85052148949
SN - 9781538670996
T3 - Proceedings of IEEE Computer Society Annual Symposium on VLSI, ISVLSI
SP - 655
EP - 659
BT - Proceedings - 2018 IEEE Computer Society Annual Symposium on VLSI, ISVLSI 2018
PB - IEEE Computer Society
T2 - 17th IEEE Computer Society Annual Symposium on VLSI, ISVLSI 2018
Y2 - 9 July 2018 through 11 July 2018
ER -