Multi-step incremental ADC with extended binary counting

Y. Zhang; Chia-Hung Chen; T. He; G. C. Temes

doi:10.1049/el.2016.0151

Multi-step incremental ADC with extended binary counting

Y. Zhang^*, Chia-Hung Chen, T. He, G. C. Temes

^*Corresponding author for this work

Department of Electrical and Computer Engineering

Research output: Contribution to journal › Article › peer-review

8 Scopus citations

Abstract

A multi-step incremental ADC (IADC) with extended binary counting is proposed. It achieves high accuracy by splitting one conversion cycle into two serial steps. During the first step, the ADC works as a first-order IADC (IADC1). The second step reuses the single integrator and extends the accuracy to 18 bits by a binary counting technique. For the same accuracy, the conversion cycle is shortened by a factor of more than 28 as compared with the single-step IADC.

Original language	English
Pages (from-to)	697-699
Number of pages	3
Journal	Electronics Letters
Volume	52
Issue number	9
DOIs	https://doi.org/10.1049/el.2016.0151
State	Published - 28 Apr 2016

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10.1049/el.2016.0151

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title = "Multi-step incremental ADC with extended binary counting",

abstract = "A multi-step incremental ADC (IADC) with extended binary counting is proposed. It achieves high accuracy by splitting one conversion cycle into two serial steps. During the first step, the ADC works as a first-order IADC (IADC1). The second step reuses the single integrator and extends the accuracy to 18 bits by a binary counting technique. For the same accuracy, the conversion cycle is shortened by a factor of more than 28 as compared with the single-step IADC.",

author = "Y. Zhang and Chia-Hung Chen and T. He and Temes, {G. C.}",

note = "Publisher Copyright: {\textcopyright} The Institution of Engineering and Technology 2016.",

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AU - He, T.

AU - Temes, G. C.

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Y1 - 2016/4/28

N2 - A multi-step incremental ADC (IADC) with extended binary counting is proposed. It achieves high accuracy by splitting one conversion cycle into two serial steps. During the first step, the ADC works as a first-order IADC (IADC1). The second step reuses the single integrator and extends the accuracy to 18 bits by a binary counting technique. For the same accuracy, the conversion cycle is shortened by a factor of more than 28 as compared with the single-step IADC.

AB - A multi-step incremental ADC (IADC) with extended binary counting is proposed. It achieves high accuracy by splitting one conversion cycle into two serial steps. During the first step, the ADC works as a first-order IADC (IADC1). The second step reuses the single integrator and extends the accuracy to 18 bits by a binary counting technique. For the same accuracy, the conversion cycle is shortened by a factor of more than 28 as compared with the single-step IADC.

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Multi-step incremental ADC with extended binary counting

Abstract

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