Module generator of data recovery for serial link receiver

Shyh-Jye Jou, Chih Hsien Lin, Yen Hung Chen, Zheng Hong Li

Research output: Chapter in Book/Report/Conference proceedingConference contributionpeer-review

4 Scopus citations


A module generator for the all-digital data recovery of a highspeed serial link, using an oversampling method, is proposed. The architecture of the proposed method is very regular and hence very suitable for standard cell implementation flow, which also makes it very suitable as a soft silicon intellectual property. This module generator can automatically generate the design parameters to deal with the oversampling architecture to meet different specifications. A design example, generated by the module generator, is implemented by using the TSMC 0.35 μm 1P4M cell library. The maximum performance of the design (without extra pipelining stages) can reach 2.09 Gbps with power consumption of 112.2 mW at 3.3 V.

Original languageEnglish
Title of host publicationProceedings - IEEE International SOC Conference, SOCC 2003
EditorsDong S. Ha, Richard Auletta, John Chickanosky
PublisherInstitute of Electrical and Electronics Engineers Inc.
Number of pages4
ISBN (Electronic)0780381823, 9780780381827
StatePublished - 1 Jan 2003
EventIEEE International SOC Conference, SOCC 2003 - Portland, United States
Duration: 17 Sep 200320 Sep 2003

Publication series

NameProceedings - IEEE International SOC Conference, SOCC 2003


ConferenceIEEE International SOC Conference, SOCC 2003
Country/TerritoryUnited States


  • Application software
  • Bandwidth
  • Clocks
  • Computer networks
  • Feedforward systems
  • Frequency synchronization
  • Intellectual property
  • Silicon
  • Timing
  • Transceivers


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