Module generator of data recovery for serial link receiver

Shyh-Jye Jou; Chih Hsien Lin; Yen Hung Chen; Zheng Hong Li

doi:10.1109/SOC.2003.1241470

Module generator of data recovery for serial link receiver

Shyh-Jye Jou, Chih Hsien Lin, Yen Hung Chen, Zheng Hong Li

Institute of Electronics

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution › peer-review

4 Scopus citations

Abstract

A module generator for the all-digital data recovery of a highspeed serial link, using an oversampling method, is proposed. The architecture of the proposed method is very regular and hence very suitable for standard cell implementation flow, which also makes it very suitable as a soft silicon intellectual property. This module generator can automatically generate the design parameters to deal with the oversampling architecture to meet different specifications. A design example, generated by the module generator, is implemented by using the TSMC 0.35 μm 1P4M cell library. The maximum performance of the design (without extra pipelining stages) can reach 2.09 Gbps with power consumption of 112.2 mW at 3.3 V.

Original language	English
Title of host publication	Proceedings - IEEE International SOC Conference, SOCC 2003
Editors	Dong S. Ha, Richard Auletta, John Chickanosky
Publisher	Institute of Electrical and Electronics Engineers Inc.
Pages	95-98
Number of pages	4
ISBN (Electronic)	0780381823, 9780780381827
DOIs	https://doi.org/10.1109/SOC.2003.1241470
State	Published - 1 Jan 2003
Event	IEEE International SOC Conference, SOCC 2003 - Portland, United States Duration: 17 Sep 2003 → 20 Sep 2003

Publication series

Name	Proceedings - IEEE International SOC Conference, SOCC 2003

Conference

Conference	IEEE International SOC Conference, SOCC 2003
Country/Territory	United States
City	Portland
Period	17/09/03 → 20/09/03

Keywords

Application software
Bandwidth
Clocks
Computer networks
Feedforward systems
Frequency synchronization
Intellectual property
Silicon
Timing
Transceivers

Access to Document

10.1109/SOC.2003.1241470

Cite this

Jou, S-J., Lin, C. H., Chen, Y. H., & Li, Z. H. (2003). Module generator of data recovery for serial link receiver. In D. S. Ha, R. Auletta, & J. Chickanosky (Eds.), Proceedings - IEEE International SOC Conference, SOCC 2003 (pp. 95-98). [1241470] (Proceedings - IEEE International SOC Conference, SOCC 2003). Institute of Electrical and Electronics Engineers Inc.. https://doi.org/10.1109/SOC.2003.1241470

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title = "Module generator of data recovery for serial link receiver",

abstract = "A module generator for the all-digital data recovery of a highspeed serial link, using an oversampling method, is proposed. The architecture of the proposed method is very regular and hence very suitable for standard cell implementation flow, which also makes it very suitable as a soft silicon intellectual property. This module generator can automatically generate the design parameters to deal with the oversampling architecture to meet different specifications. A design example, generated by the module generator, is implemented by using the TSMC 0.35 μm 1P4M cell library. The maximum performance of the design (without extra pipelining stages) can reach 2.09 Gbps with power consumption of 112.2 mW at 3.3 V.",

keywords = "Application software, Bandwidth, Clocks, Computer networks, Feedforward systems, Frequency synchronization, Intellectual property, Silicon, Timing, Transceivers",

author = "Shyh-Jye Jou and Lin, {Chih Hsien} and Chen, {Yen Hung} and Li, {Zheng Hong}",

year = "2003",

month = jan,

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doi = "10.1109/SOC.2003.1241470",

language = "English",

series = "Proceedings - IEEE International SOC Conference, SOCC 2003",

publisher = "Institute of Electrical and Electronics Engineers Inc.",

pages = "95--98",

editor = "Ha, {Dong S.} and Richard Auletta and John Chickanosky",

booktitle = "Proceedings - IEEE International SOC Conference, SOCC 2003",

address = "United States",

note = "null ; Conference date: 17-09-2003 Through 20-09-2003",

}

Jou, S-J, Lin, CH, Chen, YH & Li, ZH 2003, Module generator of data recovery for serial link receiver. in DS Ha, R Auletta & J Chickanosky (eds), Proceedings - IEEE International SOC Conference, SOCC 2003., 1241470, Proceedings - IEEE International SOC Conference, SOCC 2003, Institute of Electrical and Electronics Engineers Inc., pp. 95-98, IEEE International SOC Conference, SOCC 2003, Portland, United States, 17/09/03. https://doi.org/10.1109/SOC.2003.1241470

Module generator of data recovery for serial link receiver. / Jou, Shyh-Jye; Lin, Chih Hsien; Chen, Yen Hung et al.

Proceedings - IEEE International SOC Conference, SOCC 2003. ed. / Dong S. Ha; Richard Auletta; John Chickanosky. Institute of Electrical and Electronics Engineers Inc., 2003. p. 95-98 1241470 (Proceedings - IEEE International SOC Conference, SOCC 2003).

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution › peer-review

TY - GEN

T1 - Module generator of data recovery for serial link receiver

AU - Jou, Shyh-Jye

AU - Lin, Chih Hsien

AU - Chen, Yen Hung

AU - Li, Zheng Hong

PY - 2003/1/1

Y1 - 2003/1/1

N2 - A module generator for the all-digital data recovery of a highspeed serial link, using an oversampling method, is proposed. The architecture of the proposed method is very regular and hence very suitable for standard cell implementation flow, which also makes it very suitable as a soft silicon intellectual property. This module generator can automatically generate the design parameters to deal with the oversampling architecture to meet different specifications. A design example, generated by the module generator, is implemented by using the TSMC 0.35 μm 1P4M cell library. The maximum performance of the design (without extra pipelining stages) can reach 2.09 Gbps with power consumption of 112.2 mW at 3.3 V.

AB - A module generator for the all-digital data recovery of a highspeed serial link, using an oversampling method, is proposed. The architecture of the proposed method is very regular and hence very suitable for standard cell implementation flow, which also makes it very suitable as a soft silicon intellectual property. This module generator can automatically generate the design parameters to deal with the oversampling architecture to meet different specifications. A design example, generated by the module generator, is implemented by using the TSMC 0.35 μm 1P4M cell library. The maximum performance of the design (without extra pipelining stages) can reach 2.09 Gbps with power consumption of 112.2 mW at 3.3 V.

KW - Application software

KW - Bandwidth

KW - Clocks

KW - Computer networks

KW - Feedforward systems

KW - Frequency synchronization

KW - Intellectual property

KW - Silicon

KW - Timing

KW - Transceivers

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U2 - 10.1109/SOC.2003.1241470

DO - 10.1109/SOC.2003.1241470

M3 - Conference contribution

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T3 - Proceedings - IEEE International SOC Conference, SOCC 2003

SP - 95

EP - 98

BT - Proceedings - IEEE International SOC Conference, SOCC 2003

A2 - Ha, Dong S.

A2 - Auletta, Richard

A2 - Chickanosky, John

PB - Institute of Electrical and Electronics Engineers Inc.

Y2 - 17 September 2003 through 20 September 2003

ER -

Module generator of data recovery for serial link receiver

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