Modeling gate and substrate currents due to conduction- and valence-band electron and hole tunneling

Wen Chin Lee; Chen-Ming Hu

doi:10.1109/VLSIT.2000.852824

Modeling gate and substrate currents due to conduction- and valence-band electron and hole tunneling

Wen Chin Lee^*
, Chen-Ming Hu

^*Corresponding author for this work

International College of Semiconductor Technology

Research output: Contribution to journal › Conference article › peer-review

125 Scopus citations

Abstract

A model is proposed to quantify the tunneling currents through ultra-thin gate oxides. With a proper set of effective mass and barrier height, this new model can accurately predict the gate and substrate currents and all the sub-components in dual-gate CMOS devices. This model can also be employed to extract oxide thickness (T_ox) for thin oxide from I_g-V_g data with 0.1 angstroms sensitivity, where CV extraction can be difficult or impossible.

Original language	English
Pages (from-to)	198-199
Number of pages	2
Journal	Digest of Technical Papers - Symposium on VLSI Technology
DOIs	https://doi.org/10.1109/VLSIT.2000.852824
State	Published - 1 Jan 2000
Event	2000 Symposium on VLSI Technology - Honolulu, HI, USA Duration: 13 Jun 2000 → 15 Jun 2000

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10.1109/VLSIT.2000.852824

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title = "Modeling gate and substrate currents due to conduction- and valence-band electron and hole tunneling",

abstract = "A model is proposed to quantify the tunneling currents through ultra-thin gate oxides. With a proper set of effective mass and barrier height, this new model can accurately predict the gate and substrate currents and all the sub-components in dual-gate CMOS devices. This model can also be employed to extract oxide thickness (Tox) for thin oxide from Ig-Vg data with 0.1 angstroms sensitivity, where CV extraction can be difficult or impossible.",

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AU - Hu, Chen-Ming

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N2 - A model is proposed to quantify the tunneling currents through ultra-thin gate oxides. With a proper set of effective mass and barrier height, this new model can accurately predict the gate and substrate currents and all the sub-components in dual-gate CMOS devices. This model can also be employed to extract oxide thickness (Tox) for thin oxide from Ig-Vg data with 0.1 angstroms sensitivity, where CV extraction can be difficult or impossible.

AB - A model is proposed to quantify the tunneling currents through ultra-thin gate oxides. With a proper set of effective mass and barrier height, this new model can accurately predict the gate and substrate currents and all the sub-components in dual-gate CMOS devices. This model can also be employed to extract oxide thickness (Tox) for thin oxide from Ig-Vg data with 0.1 angstroms sensitivity, where CV extraction can be difficult or impossible.

UR - https://www.scopus.com/pages/publications/0033725602

U2 - 10.1109/VLSIT.2000.852824

DO - 10.1109/VLSIT.2000.852824

M3 - Conference article

AN - SCOPUS:0033725602

SN - 0743-1562

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EP - 199

JO - Digest of Technical Papers - Symposium on VLSI Technology

JF - Digest of Technical Papers - Symposium on VLSI Technology

T2 - 2000 Symposium on VLSI Technology

Y2 - 13 June 2000 through 15 June 2000

ER -

Modeling gate and substrate currents due to conduction- and valence-band electron and hole tunneling

Abstract

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