Miniaturized 3-dimensional transformer design

Wei-Zen Chen*, Kuo Ching Hsu

*Corresponding author for this work

Research output: Chapter in Book/Report/Conference proceedingConference contributionpeer-review

8 Scopus citations


3-dimentional fully-symmetric transformers are proposed and realized in a standard CMOS technology. In contrast to their planar counterparts, the self resonant frequency (fSR) of the proposed architecture is improved by 26 % to 53 %, while the chip area is reduced by 40 % to 70 %. The coupling coefficient (K) can be up to 0.77 at 8 GHz in a two turn two layer architecture. Distributed capacitance model (DCM) of the 3-D transformer is also proposed for fSR evaulation.

Original languageEnglish
Title of host publicationProceedings of the IEEE 2005 Custom Integrated Circuits Conference
Number of pages4
StatePublished - 1 Dec 2005
EventIEEE 2005 Custom Integrated Circuits Conference - San Jose, CA, United States
Duration: 18 Sep 200521 Sep 2005

Publication series

NameProceedings of the Custom Integrated Circuits Conference
ISSN (Print)0886-5930


ConferenceIEEE 2005 Custom Integrated Circuits Conference
Country/TerritoryUnited States
CitySan Jose, CA


  • Coupling coefficient
  • Self resonant frequency
  • Transformer


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