Methodology of Generating Timing-Slack-Based Cell-Aware Tests

Yu Teng Nien, Kai Chiang Wu, Dong Zhen Lee, Ying Yen Chen, Po Lin Chen, Mason Chern, Jih Nung Lee, Shu Yi Kao, Mango Chia Tso Chao

Research output: Contribution to journalArticlepeer-review

4 Scopus citations

Abstract

In order to reduce defect parts per million, cell-aware (CA) methodology was proposed to cover various types of intra-cell defects. In this paper, we present a novel methodology for generating 2-time-frame (2tf) CA tests based on timing slack analysis. The proposed 2tf CA fault model, aware of timing slack and named TS, defines a fault (i) on a cell instance basis, and (ii) based on per-instance timing criticality (according to timing slack). By comparing the derived extra delay against timing slack of the cell instance, a delay fault can be defined, and according to its severity, the fault can be further classified into small-delay fault or gross-delay fault. In contrast to prior 2tf CA methodology that is on a cell (rather than cell instance) basis and unaware of timing criticality/slack, our methodology can identify “more realistic” faults which really need to be considered, and potentially the cost/effort for testing those 2tf CA faults can be reduced. We also propose a test quality metric, timing slack defect coverage (TSDC), to measure the effectiveness of ATPG tests in terms of the ability to detect small-delay TS defects along long paths. Experimental results on a set of 22-nm industrial designs demonstrate that, due to more realistic fault identification, the number of identified small-delay faults can be reduced by 56.8%. With the slack-based ATPG for testing small-delay faults along long paths, TS can reduce the number of test patterns by 33.1% while achieving 0.49% higher TSDC, compared with the results of prior 2tf CA methodology.

Keywords

  • Analytical models
  • Automatic test pattern generation
  • cell-aware test
  • Circuit faults
  • defect-based test.
  • delay testing
  • Delays
  • Integrated circuit modeling
  • Standards
  • Transistors
  • Voltage measurement

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