| Original language | English |
|---|---|
| Patent number | US 7,754,551 B2 |
| State | Published - 13 Jul 2010 |
METHOD FOR MAKING VERY LOW Vt METAL-GATE/High-k CMOSFETs USING SELF-AlIGNED
Albert Chin (Inventor)
Research output: Patent
Albert Chin (Inventor)
Research output: Patent
| Original language | English |
|---|---|
| Patent number | US 7,754,551 B2 |
| State | Published - 13 Jul 2010 |