Low threshold voltage CMOSFETs with NiSi fully silicided gate and modified schottky barrier source/drain junction

Chia Pin Lin; Bing-Yue Tsui; Chih Ming Hsieh; Chih Feng Huang

doi:10.1109/VTSA.2007.378970

Low threshold voltage CMOSFETs with NiSi fully silicided gate and modified schottky barrier source/drain junction

Chia Pin Lin^*, Bing-Yue Tsui, Chih Ming Hsieh, Chih Feng Huang

^*Corresponding author for this work

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution › peer-review

Abstract

Low threshold voltage CMOSFETs with NiSi fully silicided gate and Modified Schottky barrier source/drain junction were fabricated. Symmetric threshold voltage was obtained by implant-to-silicide technique. Lateral growth rate and thermal stability of NiSi on SiO₂ were investigated. Single suicide and low temperature process make the proposed process very promising in sub-45nm technology nodes.

Original language	English
Title of host publication	2007 International Symposium on VLSI Technology, Systems and Applications, VLSI-TSA - Proceedings of Technical Papers
DOIs	https://doi.org/10.1109/VTSA.2007.378970
State	Published - 2007
Event	2007 International Symposium on VLSI Technology, Systems and Applications, VLSI-TSA - Hsinchu, Taiwan Duration: 23 Apr 2007 → 25 Apr 2007

Publication series

Name	International Symposium on VLSI Technology, Systems, and Applications, Proceedings

Conference

Conference	2007 International Symposium on VLSI Technology, Systems and Applications, VLSI-TSA
Country/Territory	Taiwan
City	Hsinchu
Period	23/04/07 → 25/04/07

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This output contributes to the following UN Sustainable Development Goals (SDGs)

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Lin, C. P., Tsui, B.-Y., Hsieh, C. M., & Huang, C. F. (2007). Low threshold voltage CMOSFETs with NiSi fully silicided gate and modified schottky barrier source/drain junction. In 2007 International Symposium on VLSI Technology, Systems and Applications, VLSI-TSA - Proceedings of Technical Papers Article 4239538 (International Symposium on VLSI Technology, Systems, and Applications, Proceedings). https://doi.org/10.1109/VTSA.2007.378970

Lin, Chia Pin ; Tsui, Bing-Yue ; Hsieh, Chih Ming et al. / Low threshold voltage CMOSFETs with NiSi fully silicided gate and modified schottky barrier source/drain junction. 2007 International Symposium on VLSI Technology, Systems and Applications, VLSI-TSA - Proceedings of Technical Papers. 2007. (International Symposium on VLSI Technology, Systems, and Applications, Proceedings).

@inproceedings{02275ee626d7418483814e49e2e301a6,

title = "Low threshold voltage CMOSFETs with NiSi fully silicided gate and modified schottky barrier source/drain junction",

abstract = "Low threshold voltage CMOSFETs with NiSi fully silicided gate and Modified Schottky barrier source/drain junction were fabricated. Symmetric threshold voltage was obtained by implant-to-silicide technique. Lateral growth rate and thermal stability of NiSi on SiO2 were investigated. Single suicide and low temperature process make the proposed process very promising in sub-45nm technology nodes.",

author = "Lin, {Chia Pin} and Bing-Yue Tsui and Hsieh, {Chih Ming} and Huang, {Chih Feng}",

year = "2007",

doi = "10.1109/VTSA.2007.378970",

language = "English",

isbn = "1424405858",

series = "International Symposium on VLSI Technology, Systems, and Applications, Proceedings",

booktitle = "2007 International Symposium on VLSI Technology, Systems and Applications, VLSI-TSA - Proceedings of Technical Papers",

note = "2007 International Symposium on VLSI Technology, Systems and Applications, VLSI-TSA ; Conference date: 23-04-2007 Through 25-04-2007",

}

Lin, CP, Tsui, B-Y, Hsieh, CM & Huang, CF 2007, Low threshold voltage CMOSFETs with NiSi fully silicided gate and modified schottky barrier source/drain junction. in 2007 International Symposium on VLSI Technology, Systems and Applications, VLSI-TSA - Proceedings of Technical Papers., 4239538, International Symposium on VLSI Technology, Systems, and Applications, Proceedings, 2007 International Symposium on VLSI Technology, Systems and Applications, VLSI-TSA, Hsinchu, Taiwan, 23/04/07. https://doi.org/10.1109/VTSA.2007.378970

Low threshold voltage CMOSFETs with NiSi fully silicided gate and modified schottky barrier source/drain junction. / Lin, Chia Pin; Tsui, Bing-Yue; Hsieh, Chih Ming et al.
2007 International Symposium on VLSI Technology, Systems and Applications, VLSI-TSA - Proceedings of Technical Papers. 2007. 4239538 (International Symposium on VLSI Technology, Systems, and Applications, Proceedings).

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution › peer-review

TY - GEN

T1 - Low threshold voltage CMOSFETs with NiSi fully silicided gate and modified schottky barrier source/drain junction

AU - Lin, Chia Pin

AU - Tsui, Bing-Yue

AU - Hsieh, Chih Ming

AU - Huang, Chih Feng

PY - 2007

Y1 - 2007

N2 - Low threshold voltage CMOSFETs with NiSi fully silicided gate and Modified Schottky barrier source/drain junction were fabricated. Symmetric threshold voltage was obtained by implant-to-silicide technique. Lateral growth rate and thermal stability of NiSi on SiO2 were investigated. Single suicide and low temperature process make the proposed process very promising in sub-45nm technology nodes.

AB - Low threshold voltage CMOSFETs with NiSi fully silicided gate and Modified Schottky barrier source/drain junction were fabricated. Symmetric threshold voltage was obtained by implant-to-silicide technique. Lateral growth rate and thermal stability of NiSi on SiO2 were investigated. Single suicide and low temperature process make the proposed process very promising in sub-45nm technology nodes.

UR - http://www.scopus.com/inward/record.url?scp=34548864387&partnerID=8YFLogxK

U2 - 10.1109/VTSA.2007.378970

DO - 10.1109/VTSA.2007.378970

M3 - Conference contribution

AN - SCOPUS:34548864387

SN - 1424405858

SN - 9781424405855

T3 - International Symposium on VLSI Technology, Systems, and Applications, Proceedings

BT - 2007 International Symposium on VLSI Technology, Systems and Applications, VLSI-TSA - Proceedings of Technical Papers

T2 - 2007 International Symposium on VLSI Technology, Systems and Applications, VLSI-TSA

Y2 - 23 April 2007 through 25 April 2007

ER -

Lin CP, Tsui BY, Hsieh CM, Huang CF. Low threshold voltage CMOSFETs with NiSi fully silicided gate and modified schottky barrier source/drain junction. In 2007 International Symposium on VLSI Technology, Systems and Applications, VLSI-TSA - Proceedings of Technical Papers. 2007. 4239538. (International Symposium on VLSI Technology, Systems, and Applications, Proceedings). doi: 10.1109/VTSA.2007.378970

Low threshold voltage CMOSFETs with NiSi fully silicided gate and modified schottky barrier source/drain junction

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