@inproceedings{af042a9f5533453aa8163c056243db34,
title = "Low temperature MOSFET technology with Schottky barrier source/drain, high-K gate dielectrics and metal gate electrode",
abstract = "Introduction Future CMOS devices require metal-gatehigh-K gate stacks, advanced sourceidrain engineering, and the use of UTB-SO1 [1-3]. The series resistance of shallow sourceidrain junction is a serious issue for future scaling, and Schottky barrier SiD (SSD) structure has been suggested as a potential solution [4-7]. MOSFETs with SSD (SSDT) have been reported using SiO22/ poly-Si gate stack [8]. However, SSDT is particularly attractive for metal gate/high-K gate stack as it avoids the use of high temperature annealing process required for implanted S/D junctions, hence eliminating the thermal stability issues associated with high-K gate stack [9]. In this work, we successfully demonstrate bulk SSDTs with CVD Hf02 high-K dielectric, PVD HfN/TaN metal gate and P'tSi (for PMOS) and DySi2-x(for NMOS) silicide source/drain using a low temperature process. The highest temperature is 420°C after high-K gate stack formation. The process can be easily extended to UTB-SOI structures.",
author = "Shiyang Zhu and Shen Chen and Zhu Chunxiang and Yu, {H. Y.} and Whang, {S. J.} and Chen, {J. H.} and Lee, {S. J.} and Li, {M. F.} and Chan, {D. S.H.} and Yoo, {W. J.} and Anyan Du and Tung, {C. H.} and Jagar Singh and Albert Chin and Kwong, {D. L.}",
year = "2003",
doi = "10.1109/ISDRS.2003.1272085",
language = "English",
series = "2003 International Semiconductor Device Research Symposium, ISDRS 2003 - Proceedings",
publisher = "Institute of Electrical and Electronics Engineers Inc.",
pages = "254--255",
booktitle = "2003 International Semiconductor Device Research Symposium, ISDRS 2003 - Proceedings",
address = "美國",
note = "International Semiconductor Device Research Symposium, ISDRS 2003 ; Conference date: 10-12-2003 Through 12-12-2003",
}