@inproceedings{7de4960ce52d4296b4952d977df98748,
title = "Low power nonvolatile SRAM circuit with integrated low voltage nanocrystal PMOS Flash",
abstract = "This paper presents a new nonvolatile SRAM design that incorporates low-voltage nanocrystal PMOS Flash transistors. The design enables global store, restore and erase operations with negligible penalty on regular SRAM operation. Store/erase operations also do not consume much power even considering charge pump circuits. Circuit simulations based on experimental I-V characteristics demonstrate that 10 s store/erase operation at 6 Vis sufficient for correct restoration of the stored bit even under reasonable process variation.",
author = "Shantanu Rajwade and Yu, {Wing Kei} and Sarah Xu and Tuo-Hung Hou and Suh, {G. Edward} and Edwin Kan",
year = "2010",
month = dec,
day = "1",
doi = "10.1109/SOCC.2010.5784679",
language = "English",
isbn = "9781424466832",
series = "Proceedings - IEEE International SOC Conference, SOCC 2010",
pages = "461--466",
booktitle = "Proceedings - IEEE International SOC Conference, SOCC 2010",
note = "23rd IEEE International SOC Conference, SOCC 2010 ; Conference date: 27-09-2010 Through 29-09-2010",
}