Low-power multirate architecture for if digital frequency down converter

Shyh-Jye Jou*, Shou Yang Wu, Chorng Kuang Wang

*Corresponding author for this work

Research output: Contribution to journalArticlepeer-review

19 Scopus citations


In this paper, a novel low-power multirate architecture for an IF digital frequency downconversion process is presented. The architecture design is the combination of 4-11 oversampling technique and multistage interpolated finite impulse response (IFIR) filter design based on multirate algorithm. It can have very low-power dissipation owing to its reduction in hardware complexity and operational freque.cy. The design example shows that it consumes only 24% power of direct implementation while occupying 26% less area.

Original languageEnglish
Pages (from-to)1487-1494
Number of pages8
JournalIEEE Transactions on Circuits and Systems II: Analog and Digital Signal Processing
Issue number11
StatePublished - 1998


  • Frequency down converter
  • Low power
  • Multirate architecture


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